发明申请
US20200295147A1 GATE FIRST TECHNIQUE IN VERTICAL TRANSPORT FET USING DOPED SILICON GATES WITH SILICIDE
审中-公开
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基本信息:
- 专利标题: GATE FIRST TECHNIQUE IN VERTICAL TRANSPORT FET USING DOPED SILICON GATES WITH SILICIDE
- 申请号:US16351729 申请日:2019-03-13
- 公开(公告)号:US20200295147A1 公开(公告)日:2020-09-17
- 发明人: RUQIANG BAO , HEMANTH JAGANNATHAN , Paul Charles Jamison , Choonghyun Lee , Sanjay C. Mehta , Vijay Narayanan
- 申请人: INTERNATIONAL BUSINESS MACHINES CORPORATION
- 主分类号: H01L29/417
- IPC分类号: H01L29/417 ; H01L29/423 ; H01L29/66 ; H01L29/78 ; H01L29/778
摘要:
A technique relates to a semiconductor device. A gate stack is formed on a fin, the gate stack being formed to have a length in a vertical direction. A gate contact is formed adjacent to the gate stack for the length of the gate stack in the vertical direction.
公开/授权文献:
IPC结构图谱:
H | 电学 |
--H01 | 基本电气元件 |
----H01L | 半导体器件;其他类目未包含的电固体器件 |
------H01L29/00 | 专门适用于整流、放大、振荡或切换,并具有至少一个电位跃变势垒或表面势垒的半导体器件;具有至少一个电位跃变势垒或表面势垒,例如PN结耗尽层或载流子集结层的电容器或电阻器;半导体本体或其电极的零部件 |
--------H01L29/02 | .按其半导体本体的特征区分的 |
----------H01L29/41 | ..以其形状、相对尺寸或位置为特征的 |
------------H01L29/417 | ...通有待整流、放大或切换电流的 |