发明申请
US20070229145A1 Method and Apparatus for Dynamic Threshold Voltage Control of MOS Transistors in Dynamic Logic Circuits
有权
![Method and Apparatus for Dynamic Threshold Voltage Control of MOS Transistors in Dynamic Logic Circuits](/abs-image/US/2007/10/04/US20070229145A1/abs.jpg.150x150.jpg)
基本信息:
- 专利标题: Method and Apparatus for Dynamic Threshold Voltage Control of MOS Transistors in Dynamic Logic Circuits
- 专利标题(中):用于动态逻辑电路中MOS晶体管的动态阈值电压控制的方法和装置
- 申请号:US11684466 申请日:2007-03-09
- 公开(公告)号:US20070229145A1 公开(公告)日:2007-10-04
- 发明人: Ashok Kapoor , Robert Strain , Reuven Marko
- 申请人: Ashok Kapoor , Robert Strain , Reuven Marko
- 主分类号: H03K3/01
- IPC分类号: H03K3/01
摘要:
Metal-oxide semiconductor (MOS) transistors that are operable at voltages below 1.5V, that are area efficient, and that exhibit improved drive strength and leakage current that are disclosed. A dynamic threshold voltage control scheme is used that does not require a change to existing MOS technology processes. Threshold voltage of the transistor is controlled, such that in the Off state, the threshold voltage of the transistor is set high, keeping the transistor leakage to a small value. The advantages provided by apply to dynamic logic, as well as in the specific well separation imposed by design rules because well potential difference are lower than the supply voltage swing.
摘要(中):
可在低于1.5V的电压下工作的金属氧化物半导体(MOS)晶体管,其面积效率高,并且表现出改进的驱动强度和漏电流。 使用动态阈值电压控制方案,其不需要改变现有的MOS技术过程。 控制晶体管的阈值电压,使得在关断状态下,晶体管的阈值电压被设置为高,从而将晶体管泄漏保持在较小的值。 动态逻辑提供的优点,以及设计规则施加的具体井分离,因为潜在电位差低于电源电压摆幅。