The present invention relates to a method of manufacturing the power semiconductor device to reduce the overall conduction losses by reducing power semiconductor device to channel resistance by reducing the channel length, the method of manufacturing the power semiconductor device of the present invention, the first conductivity type semiconductor substrate comprising on a gate insulating film; Forming a first gate electrode on a predetermined region on the gate insulating film; Comprising: using the first gate electrode as a mask to inject a second conductivity type impurity ion on the front surface of the semiconductor substrate to form a second conductivity-type well region in a surface of the semiconductor substrate; Wherein the first isotropic etching the gate electrode to decrease the thickness and width than the first gate electrode to form a second gate electrode; Selective implantation with a first conductivity type impurity ions into the front surface of the semiconductor substrate using the second gate electrode as a mask to form a source region in a surface of a semiconductor substrate having a second conductivity type well region, and defines the channel region the step of; And is made by a step of respectively forming a source electrode and a drain electrode on the top surface and the back surface of the semiconductor substrate, the length of the channel region is shortened by the thickness and width of the first gate electrode reduced. Power semiconductor device, a gate electrode, an insulating film, a source region, a well region, a drain electrode,