基本信息:
- 专利标题: NONVOLATILE SEMICONDUCTOR MEMORY DEVICE
- 申请号:JP21828196 申请日:1996-08-20
- 公开(公告)号:JPH1064285A 公开(公告)日:1998-03-06
- 发明人: KATO MASATAKA , TSUCHIYA OSAMU , YADORI SHOJI , TANAKA TOSHIHIRO , ADACHI TETSUO
- 申请人: HITACHI LTD
- 专利权人: HITACHI LTD
- 当前专利权人: HITACHI LTD
- 优先权: JP21828196 1996-08-20
- 主分类号: G11C17/00
- IPC分类号: G11C17/00 ; G11C7/00 ; G11C16/02 ; G11C16/04 ; H01L21/8247 ; H01L27/115 ; H01L29/788 ; H01L29/792
摘要:
PROBLEM TO BE SOLVED: To make possible the application of a micro memory cell and reduce an area of a memory chip, by impressing a voltage to a source, a drain diffusion layer step by step when electrons are pulled from a floating gate electrode. SOLUTION: When electrons are pulled out from a floating gate electrode, a positive voltage is impressed to a diffusion layer opposite to a diffusion layer where the electrons are to be pulled, thereby to decrease a maximum voltage impressed between a source terminal and a drain terminal. Further, a positive voltage is impressed to a control gate electrode of a memory cell where the electrons are not pulled and a diffusion layer not in a pull-out direction is let to float. A write/erasure method for the memory cell which is not restricted by a voltage decrease inviting a problematic punch-through current between the source and drain when the memory cell is microminiaturized, in other words, not restricted by a decrease of a punch-through voltage is obtained, and a memory chip can be very small.