基本信息:
- 专利标题: SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE AND MANUFACTURE THEREOF
- 申请号:JP12381188 申请日:1988-05-23
- 公开(公告)号:JPH01293556A 公开(公告)日:1989-11-27
- 发明人: WATANABE MASAYUKI , SUGANO TOSHIO , TSUKUI SEIICHIRO , ONO TAKASHI , WAKASHIMA YOSHIAKI
- 申请人: HITACHI LTD , HITACHI DEVICE ENG , HITACHI TOBU SEMICONDUCTOR LTD , AKITA DENSHI KK
- 专利权人: HITACHI LTD,HITACHI DEVICE ENG,HITACHI TOBU SEMICONDUCTOR LTD,AKITA DENSHI KK
- 当前专利权人: HITACHI LTD,HITACHI DEVICE ENG,HITACHI TOBU SEMICONDUCTOR LTD,AKITA DENSHI KK
- 优先权: JP12381188 1988-05-23
- 主分类号: H01L23/52
- IPC分类号: H01L23/52 ; H01L21/60 ; H01L25/10 ; H01L25/11 ; H01L25/18 ; H05K1/14 ; H05K1/18
摘要:
PURPOSE:To enhance the mounting density of a semiconductor device such as a memory device, etc., by connecting the bump electrodes of a semiconductor chip to leads, and connecting the plurality of the chips having the leads to the interconnections of a module board to compose a semiconductor device. CONSTITUTION:The bump electrodes 6 of a semiconductor chip 4 are connected to leads 5, and a plurality of semiconductor chips 4 having the leads 5 are connected to the interconnections of a module board 1 to compose a semiconductor device. For example, eight semiconductor chips 4A to 4D are mounted on the front and rear faces of the board 1 composed by laminating a plurality of ceramic and interconnecting layers. The chips 4A to 4D are not sealed by a package made of ceramics, resin, etc., but the side provided with semiconductor elements and interconnections is molded with resin 7. Bump electrodes 6 are provided on the chips 4A to 4D, and the leads 5A to 5D are connected to the electrodes 6 by TABs.
公开/授权文献:
- JP2559461B2 公开/授权日:1996-12-04
信息查询:
EspacenetIPC结构图谱:
H | 电学 |
--H01 | 基本电气元件 |
----H01L | 半导体器件;其他类目未包含的电固体器件 |
------H01L23/00 | 半导体或其他固态器件的零部件 |
--------H01L23/52 | .用于在处于工作中的器件内部从一个组件向另一个组件通电的装置 |