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    • 1. 发明申请
    • SYSTEM AND METHOD FOR LITHOGRAPHY SIMULATION
    • 系统和方法进行算术仿真
    • WO2005040917A3
    • 2006-02-23
    • PCT/US2004028864
    • 2004-09-07
    • BRION TECH INCYE JUNLU YEN-WENCAO YUCHEN LUOQICHEN XUN
    • YE JUNLU YEN-WENCAO YUCHEN LUOQICHEN XUN
    • G03B27/54G03F20060101G03F7/20G06F17/50G06K9/00G06T7/00G03F1/02G06F19/00G06K9/20G06K9/36
    • G06F17/5009G03F1/00G03F7/004G03F7/705G03F7/70666G06F17/5081G06F19/00G06F2217/12G06F2217/14G06T7/0004G06T2207/30148G21K5/00
    • There are many inventions described and illustrated herein. In one aspect, the present invention is directed to a technique of, and system for simulating, verifying, inspecting, characterizing, determining and/or evaluating the lithographic designs, techniques and/or systems, and/or individual functions performed thereby or components used therein. In one embodiment, the present invention is a system and method that accelerates lithography simulation, inspection, characterization and/or evaluation of the optical characteristics and/or properties, as well as the effects and/or interactions of lithographic systems and processing techniques. In this regard, in one embodiment, the present invention employs a lithography simulation system architecture (110), including application-specific hardware accelerators (116a 116n), and a processing technique to accelerate and facilitate verification, characterization and/or inspection of a mask design, for example, RET design, including detailed simulation and characterization of the entire lithography process to verify that the design achieves and/or provides the desired results on final wafer pattern. The system (110) includes: general purpose-type computing device(s) (114a, 142a, 142b) to perform the case-based logic having branches and interdependency in the data handling and accelerator subsystems (146a1 146ax, , 146n1 146nx) to perform a majority of the computation intensive tasks.
    • 这里描述和说明了许多发明。 在一个方面,本发明涉及用于模拟,验证,检查,表征,确定和/或评估光刻设计,技术和/或系统的技术和系统,和/或由其执行的各个功能或使用的组件 在其中。 在一个实施例中,本发明是加速光刻特性和/或性质的光刻模拟,检查,表征和/或评估以及光刻系统和处理技术的效果和/或相互作用的系统和方法。 在这方面,在一个实施例中,本发明采用包括特定于应用的硬件加速器(116a 116n)的光刻仿真系统架构(110),以及用于加速和促进掩模的验证,表征和/或检查的处理技术 设计,例如,RET设计,包括整个光刻工艺的详细的仿真和表征,以验证设计在最终的晶片图案上实现和/或提供期望的结果。 系统(110)包括:通用目的型计算设备(114a,142a,142b),用于执行在数据处理和加速器子系统(146a1 146ax,146n1 146nx)中具有分支和相互依赖性的基于情况的逻辑, 执行大部分计算密集型任务。