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1. 发明申请

WO2006034311A3 LOW VOLTAGE TRACK AND HOLD CIRCUITS 审中-公开
标题翻译：低电压跟踪和保持电路
公开(公告)号：WO2006034311A3
公开(公告)日：2008-10-09
申请号：PCT/US2005033736
申请日：2005-09-20
申请人： UNIV COLUMBIA , CHATTERJEE SHOURI , KINGET PETER R
发明人： CHATTERJEE SHOURI , KINGET PETER R
IPC分类号： H03F1/02 , H03F3/45 , H03K5/00
CPC分类号： H03K5/22 , H03F3/45071 , H03F2200/331
摘要： Circuits that operate with power supplies of less than 1 Volt are presented. More particularly, circuits that operate with supply voltages near or lower than the threshold voltage of the transistors in those circuits are presented. Various circuits and embodiments such as operational transconductance amplifiers, biasing circuits, integrators, continuous-time sigma delta modulators, track-and-hold circuits, and others are presented. The techniques and circuits can be used in a wide range of applications and various transistors from metal-oxide-semiconductor to bipolar junction transistors may implement the techniques presented herein.
摘要翻译：介绍使用电源小于1伏的电路。更具体地，提供了在这些电路中接近或低于晶体管的阈值电压的电源电压下工作的电路。提出了诸如运算跨导放大器，偏置电路，积分器，连续时间Σ-Δ调制器，跟踪和保持电路等各种电路和实施例。技术和电路可以用于广泛的应用中，并且从金属氧化物半导体到双极结型晶体管的各种晶体管可以实现本文提出的技术。

2. 发明申请

WO2015163971A2 CIRCUITS FOR LOW NOISE AMPLIFIERS WITH INTERFERER REFLECTING LOOPS 审中-公开
标题翻译：具有干扰反射灯的低噪声放大器电路
公开(公告)号：WO2015163971A2
公开(公告)日：2015-10-29
申请号：PCT/US2015015036
申请日：2015-02-09
申请人： UNIV COLUMBIA
发明人： ZHU JIANXUN , KINGET PETER R , KRISHNASWAMY HARISH
IPC分类号： H03F1/44
CPC分类号： H03F1/342 , H03F1/223 , H03F3/193 , H03F3/211 , H03F3/45179 , H03F3/45645 , H03F3/72 , H03F2200/06 , H03F2200/09 , H03F2200/168 , H03F2200/294 , H03F2200/411 , H03F2200/78 , H03F2203/45311 , H03F2203/45418 , H03F2203/45424 , H03F2203/45512
摘要： Circuits for low noise amplifiers with interferer reflecting loops are provided. In some embodiments, circuits for a low noise amplifier with an interferer reflecting loop are provided, the circuits comprising: a low noise amplifier (LNA) having an input and an output; a buffer having an input coupled to the output of the LNA and an output; and notch filter having an input coupled to the output of the buffer and an output coupled to the input of the LNA.
摘要翻译：提供了具有干扰源反射回路的低噪声放大器电路。在一些实施例中，提供了具有干扰反射环路的低噪声放大器的电路，所述电路包括：具有输入和输出的低噪声放大器（LNA）; 具有耦合到所述LNA的输出的输入和输出的缓冲器; 并且陷波滤波器具有耦合到缓冲器的输出的输入端和耦合到LNA的输入的输出。

3. 发明申请

WO2014015277A3 CIRCUITS AND METHODS FOR PERFORMING HARMONIC REJECTION MIXING 审中-公开
标题翻译：用于执行谐波抑制混合的电路和方法
公开(公告)号：WO2014015277A3
公开(公告)日：2015-07-23
申请号：PCT/US2013051338
申请日：2013-07-19
申请人： UNIV COLUMBIA
发明人： TRIPURARI KARTHIK , KINGET PETER R , KRISHNASWAMY HARISH , YANG TENG
IPC分类号： G06G7/12
CPC分类号： H04B1/123 , H03D7/1441 , H03D7/1458 , H03D2200/0086 , H04L25/14
摘要： Circuits and methods for performing harmonic rejection mixing are provided. In some embodiments, the circuit comprises: a first amplifier that amplifies a received signal at a first gain; a second amplifier that amplifies the received signal at a fraction of the first gain; a mixer that receives a local oscillator signal having a first fundamental frequency and the first amplifier output, and outputs a first mixed signal; a second mixer that receives a second local oscillator signal having a fundamental frequency that is a multiple of the first fundamental frequency and the second amplifier output, and outputs a second mixed signal; and an output stage that receives the first and second mixed signals and outputs a sum of the first and second mixed signals.
摘要翻译：提供用于执行谐波抑制混合的电路和方法。在一些实施例中，该电路包括：第一放大器，其以第一增益放大接收信号; 第二放大器，以第一增益的一小部分放大接收信号; 接收具有第一基频的本地振荡器信号和所述第一放大器输出的混频器，并输出第一混合信号; 接收第二本地振荡器信号的第二混频器，所述第二本机振荡器信号的基频是所述第一基频和所述第二放大器输出的倍数，并输出第二混合信号; 以及输出级，其接收第一和第二混合信号并输出第一和第二混合信号的和。

4. 发明申请

WO2006127851A3 SYSTEMS AND METHODS FOR REDUCING CIRCUIT AREA 审中-公开
标题翻译：降低电路面积的系统和方法
公开(公告)号：WO2006127851A3
公开(公告)日：2007-05-24
申请号：PCT/US2006020155
申请日：2006-05-24
申请人： UNIV COLUMBIA , KINGET PETER R , ZHANG FRANK
发明人： KINGET PETER R , ZHANG FRANK
IPC分类号： H01F5/00
CPC分类号： H01L23/5227 , H01F2017/0046 , H01F2017/008 , H01F2021/125 , H01L27/0207 , H01L27/0727 , H01L28/10 , H01L2924/0002 , H01L2924/00
摘要： Methods and systems are provided for reducing circuit area. Some embodiments provide electronic devices including an inductor formed from a path having two ends that loops substantially in a plane around a center area, wherein the path crosses itself at at least two points and wherein the path defines an outer boundary of the inductor; and a circuit that is located within the outer boundary of the inductor and substantially within or adjacent to the plane. Other embodiments provide electronic devices including an inductor formed from a path having two ends that loops substantially in a plane around a center area, wherein the path defines an outer boundary of the inductor; and a circuit that is located within the outer boundary of the inductor and substantially within or adjacent to the plane, and wherein the circuit comprises a signal path that is rake-shaped and crosses the path of the inductor at substantially perpendicular angles.
摘要翻译：提供了减少电路面积的方法和系统。一些实施例提供了电子设备，其包括由具有两个端部的路径形成的电感器，所述两个端部基本围绕围绕中心区域的平面环绕，其中，所述路径在至少两个点处与其自身交叉，并且其中所述路径限定所述电感器的外边界; 以及位于电感器的外边界内并且基本上在平面内或与平面相邻的电路。其他实施例提供电子设备，其包括由具有两个端部的路径形成的电感器，所述两端部基本围绕中心区域的平面环绕，其中该路径限定电感器的外边界; 以及位于电感器的外边界内并且基本上在该平面内或与该平面相邻的电路，并且其中该电路包括一个信号路径，该信号路径是前进角度的，并以大致垂直的角度穿过该电感器的路径。

5. 发明申请

WO2006034371A3 LOW VOLTAGE OPERATIONAL TRANSCONDUCTANCE AMPLIFIER CIRCUITS 审中-公开
标题翻译：低电压工作电压放大器电路
公开(公告)号：WO2006034371A3
公开(公告)日：2006-10-12
申请号：PCT/US2005033885
申请日：2005-09-20
申请人： UNIV COLUMBIA , CHATTERJEE SHOURI , KINGET PETER R , TSIVIDIS YANNIS
发明人： CHATTERJEE SHOURI , KINGET PETER R , TSIVIDIS YANNIS
IPC分类号： H03F3/45
CPC分类号： H03K5/22 , H03F3/45071 , H03F2200/331
摘要： Circuits (Fig. 1) that operate with power supplies (VDD) of less than 1 Volt are present. More particularly, circuits (Fig. 1) that operate with supply voltages (VDD) near or lower than the threshold voltage of the transistors (M1A, M1B) in those circuits are presented. Various circuits and embodiments such as operational transconductance amplifiers, biasing circuits, integrators, continuous-time sigma delta modulators, track-and-hold circuits, and others are presented. The techniques and circuits can be used in a wide range of applications and various transistors from metal-oxide-semiconductor (MOS) to bipolar junction transistors may implement the techniques presented herein.
摘要翻译：存在电源（VDD）小于1伏特的电路（图1）。更具体地，示出了在这些电路中接近或低于晶体管（M1A，M1B）的阈值电压的电源电压（VDD））下工作的电路（图1）。提出了诸如运算跨导放大器，偏置电路，积分器，连续时间Σ-Δ调制器，跟踪和保持电路等各种电路和实施例。技术和电路可用于广泛的应用，并且从金属氧化物半导体（MOS）到双极结型晶体管的各种晶体管可以实现本文提出的技术。

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