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1. 发明申请

WO2010027222A4 AMPLIFIER INCLUDING DITHERING SWITCH, AND DISPLAY DRIVING CIRCUIT USING THE AMPLIFIER 审中-公开
标题翻译：放大器包括切换开关，并使用放大器显示驱动电路
公开(公告)号：WO2010027222A4
公开(公告)日：2010-08-12
申请号：PCT/KR2009005028
申请日：2009-09-04
申请人： SILICON WORKS CO LTD , SON YOUNG SUK , AHN YONG SUNG , CHO HYUN JA , OH HYUNG SEOG , HAN DAE KEUN
发明人： SON YOUNG SUK , AHN YONG SUNG , CHO HYUN JA , OH HYUNG SEOG , HAN DAE KEUN
IPC分类号： G09G3/36
CPC分类号： G09G3/20 , G09G2310/0248 , G09G2310/0254 , G09G2310/027 , G09G2310/0291 , G09G2310/0297 , G09G2330/023
摘要： The present invention introduces an amplifier with the minimal number of MOS transistors and dithering switches, and a display driving circuit using the amplifier as a buffer. The amplifier comprises an input stage, a bias stage and an output stage. The inputs stage determines the voltage levels of two nodes in correspondence to two voltages received by responding to a first bias voltage, and includes four path-selection switches, two input transistors and one bias transistor. The bias stage generates two class-AB output voltages corresponding to the voltage levels of the two nodes, and includes a current mirror, ten path-selection switches, a class-AB bias circuit and two bias transistors. The output stages generates output voltages corresponding to the two class-AB output voltages, and contains two coupling capacitors and two push-pull transistors. Here, the plural path selection switches operate by one signal of first and second path selection signals that are exclusively enabled.
摘要翻译：本发明引入了具有最小数量的MOS晶体管和抖动开关的放大器以及使用放大器作为缓冲器的显示驱动电路。放大器包括输入级，偏置级和输出级。输入级通过响应于第一偏置电压来确定与接收的两个电压相对应的两个节点的电压电平，并且包括四个路径选择开关，两个输入晶体管和一个偏置晶体管。偏置级产生对应于两个节点的电压电平的两个AB类输出电压，并且包括电流镜，十路径选择开关，AB类偏置电路和两个偏置晶体管。输出级产生对应于两个AB类输出电压的输出电压，并且包含两个耦合电容器和两个推挽晶体管。这里，多路径选择开关通过独占使能的第一和第二路径选择信号的一个信号进行操作。

2. 发明申请

WO2010027222A2 AMPLIFIER INCLUDING DITHERING SWITCH, AND DISPLAY DRIVING CIRCUIT USING THE AMPLIFIER 审中-公开
公开(公告)号：WO2010027222A2
公开(公告)日：2010-03-11
申请号：PCT/KR2009005028
申请日：2009-09-04
申请人： SILICON WORKS CO LTD , SON YOUNG SUK , AHN YONG SUNG , CHO HYUN JA , OH HYUNG SEOG , HAN DAE KEUN
发明人： SON YOUNG SUK , AHN YONG SUNG , CHO HYUN JA , OH HYUNG SEOG , HAN DAE KEUN
IPC分类号： G09G3/36
CPC分类号： G09G3/20 , G09G2310/0248 , G09G2310/0254 , G09G2310/027 , G09G2310/0291 , G09G2310/0297 , G09G2330/023
摘要： The present invention introduces an amplifier with the minimal number of MOS transistors and dithering switches, and a display driving circuit using the amplifier as a buffer. The amplifier comprises an input stage, a bias stage and an output stage. The inputs stage determines the voltage levels of two nodes in correspondence to two voltages received by responding to a first bias voltage, and includes four path-selection switches, two input transistors and one bias transistor. The bias stage generates two class-AB output voltages corresponding to the voltage levels of the two nodes, and includes a current mirror, ten path-selection switches, a class-AB bias circuit and two bias transistors. The output stages generates output voltages corresponding to the two class-AB output voltages, and contains two coupling capacitors and two push-pull transistors. Here, the plural path selection switches operate by one signal of first and second path selection signals that are exclusively enabled.

3. 发明申请

WO2010030097A3 DISPLAY DRIVE CIRCUIT 审中-公开
标题翻译：显示驱动电路
公开(公告)号：WO2010030097A3
公开(公告)日：2010-06-24
申请号：PCT/KR2009005030
申请日：2009-09-04
申请人： SILICON WORKS CO LTD , SON YOUNG SUK , SONG HYUN-MIN , CHO HYUN JA , AHN YONG SUNG , OH HYUNG SEOG , HAN DAE KEUN
发明人： SON YOUNG SUK , SONG HYUN-MIN , CHO HYUN JA , AHN YONG SUNG , OH HYUNG SEOG , HAN DAE KEUN
IPC分类号： G09G3/36
CPC分类号： G09G3/3614 , G09G3/3688 , G09G2310/0248 , G09G2310/0297 , G09G2330/021
摘要： The present invention discloses a display drive circuit which minimises electric current consumption. Said display drive circuit comprises a buffer, an N dot switch circuit, charge distribution switch circuit and a shared voltage level regulator switch circuit. «Said buffer buffers a plurality of pixel signal outputs from multiple analogue to digital converters. The N dot switches select the path of the plurality of pixel signal outputs by said buffer in response to a first path selection signal and a second path selection signal, determined according to the dot inversion format, and switches between a plurality of output terminals. Said charge distribution switch circuit distributes the charge to said plurality of output terminals in response to the charge distribution control signal. »Said shared voltage level regulator switch circuit controls the distribution of charge between said plurality of output terminals and the voltage level on distribution of charge, in response to the shared voltage level control signal. «««
摘要翻译：本发明公开了一种使电流消耗最小化的显示驱动电路。所述显示驱动电路包括缓冲器，N点开关电路，电荷分配开关电路和共享电压电平调节器开关电路。 “所述缓冲器缓冲来自多个模数转换器的多个像素信号输出。 N点开关响应于根据点反转格式确定的第一路径选择信号和第二路径选择信号来选择由所述缓冲器输出的多个像素信号的路径，并且在多个输出端子之间切换。所述电荷分配开关电路响应于电荷分配控制信号将电荷分配给所述多个输出端子。所述共享电压电平调节器开关电路响应于共享电压电平控制信号来控制所述多个输出端子之间的电荷分布和电荷分布上的电压电平。 «««<0}

4. 发明申请

WO2009154355A4 DISPLAY DRIVE CIRCUIT AND DRIVE METHOD 审中-公开
标题翻译：显示驱动电路和驱动方法
公开(公告)号：WO2009154355A4
公开(公告)日：2010-05-14
申请号：PCT/KR2009002693
申请日：2009-05-22
申请人： SILICON WORKS CO LTD , CHO HYUN HO , CHO HYUN JA , NA JOON HO , KIM DAE SEONG , HAN DAE KEUN
发明人： CHO HYUN HO , CHO HYUN JA , NA JOON HO , KIM DAE SEONG , HAN DAE KEUN
IPC分类号： G09G3/36
CPC分类号： G09G3/3685 , G09G3/20 , G09G3/3688 , G09G2310/0275 , G09G2310/061 , G09G2320/0257 , G09G2330/021
摘要： The present invention concerns a display drive circuit and drive method for not only minimising afterimages on display panels but also minimising electrical current consumption. The display drive circuit comprises: N data-selection switches (where N is an integer) for generating drive signals corresponding to valid data and black data, and transmitting the signals to a display panel; N buffers; N buffer output selection switches; and a plurality of charge-distribution switches. The N data-selection switches select one or other of the valid data and black data. The N buffers respectively buffer the signals selected by the data-selection switches. The N buffer output selection switches respectively switch the buffer outputs, and output the drive signals. The plurality of charge-distribution switches connect two neighbouring drive signals with each other.
摘要翻译：本发明涉及一种显示驱动电路和驱动方法，其不仅使显示面板上的余像最小化，而且还使电流消耗最小化。该显示驱动电路包括：N个数据选择开关（其中N是整数），用于产生对应于有效数据和黑色数据的驱动信号，并将这些信号传输到显示面板; N个缓冲区; N个缓冲输出选择开关; 和多个电荷分配开关。 N个数据选择开关选择有效数据和黑色数据中的一个或另一个。 N个缓冲器分别缓冲由数据选择开关选择的信号。 N个缓冲输出选择开关分别切换缓冲输出，并输出驱动信号。多个电荷分配开关将两个相邻驱动信号彼此连接。

5. 发明申请

WO2009154355A3 DISPLAY DRIVE CIRCUIT AND DRIVE METHOD 审中-公开
标题翻译：显示驱动电路和驱动方法
公开(公告)号：WO2009154355A3
公开(公告)日：2010-03-25
申请号：PCT/KR2009002693
申请日：2009-05-22
申请人： SILICON WORKS CO LTD , CHO HYUN HO , CHO HYUN JA , NA JOON HO , KIM DAE SEONG , HAN DAE KEUN
发明人： CHO HYUN HO , CHO HYUN JA , NA JOON HO , KIM DAE SEONG , HAN DAE KEUN
IPC分类号： G09G3/36
CPC分类号： G09G3/3685 , G09G3/20 , G09G3/3688 , G09G2310/0275 , G09G2310/061 , G09G2320/0257 , G09G2330/021
摘要： The present invention concerns a display drive circuit and drive method for not only minimising afterimages on display panels but also minimising electrical current consumption. The display drive circuit comprises: N data-selection switches (where N is an integer) for generating drive signals corresponding to valid data and black data, and transmitting the signals to a display panel; N buffers; N buffer output selection switches; and a plurality of charge-distribution switches. The N data-selection switches select one or other of the valid data and black data. The N buffers respectively buffer the signals selected by the data-selection switches. The N buffer output selection switches respectively switch the buffer outputs, and output the drive signals. The plurality of charge-distribution switches connect two neighbouring drive signals with each other.
摘要翻译：本发明涉及一种显示驱动电路和驱动方法，用于不仅使显示面板上的残影最小化，而且最小化电流消耗。显示驱动电路包括：用于产生对应于有效数据和黑数据的驱动信号的N个数据选择开关（其中N是整数），并将该信号发送到显示面板; N个缓冲区 N个缓冲输出选择开关; 和多个电荷分配开关。 N个数据选择开关选择一个或多个有效数据和黑色数据。 N个缓冲器分别缓冲由数据选择开关选择的信号。 N个缓冲器输出选择开关分别切换缓冲器输出，并输出驱动信号。多个电荷分配开关将两个相邻的驱动信号彼此连接。

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