专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明申请

WO2019224374A1 MULTI-MASTER SECURITY CIRCUIT 审中-公开
公开(公告)号：WO2019224374A1
公开(公告)日：2019-11-28
申请号：PCT/EP2019/063519
申请日：2019-05-24
申请人： SECURE-IC SAS
发明人： DAFALI, Rachid , DAVID, Freddy , LE ROLLAND, Michel , LORVELLEC, Karine
IPC分类号： G06F21/72 , G06F21/60 , G06F21/85
摘要： There is provided a System on Chip comprising at least two hardware masters, a security circuit, and a communication infrastructure for communication between the hardware masters and the security circuit, the communication infrastructure being based on a given interface communication protocol. Each hardware master is configured to send a request to the security circuit for execution of the request by the security circuit through the communication infrastructure, each request comprising at least one service identifier identifying a service. The security circuit may comprise a Secure Mailbox comprising a filter configured to filter the requests received from the hardware masters, the filter being configured to determine at least one indicator bit, in response to the receipt of a request from a hardware master, using at least a part of an identifier associated with the master, the indicator bit indicating whether the master is allowed access to the Security circuit, the identifier being an hardware identifier received with the request through the communication protocol, the filter filtering the requests based on the bit indicators determined for each request. The security circuit is further configured to execute the filtered requests.

2. 发明申请

WO2019243299A1 IMPROVED DETECTION OF LASER FAULT INJECTION ATTACKS ON CRYPTOGRAPHIC DEVICES 审中-公开
公开(公告)号：WO2019243299A1
公开(公告)日：2019-12-26
申请号：PCT/EP2019/065955
申请日：2019-06-18
申请人： SECURE-IC SAS
发明人： GUILLEY, Sylvain , LE ROLLAND, Michel
IPC分类号： G06F21/75 , G06F21/77
摘要： The invention relates to countermeasures against fault injection attacks of a cryptographic integrated circuit, and more specifically laser fault injection attacks. The invention consists in generating sequences of bits belonging to a set of allowed sequences, and storing these sequences on a set of Flip-Flops. Then the sequences stored on the Flip-Flops are checked and, if they do not belong to the allowed sequence, this is the sign that a fault injection attack occurred and caused a bit flip in one of the flip-flops. An alarm signal is then generated.

3. 发明申请

WO2020136141A1 DEVICE AND METHOD FOR PROTECTING A MEMORY 审中-公开
公开(公告)号：WO2020136141A1
公开(公告)日：2020-07-02
申请号：PCT/EP2019/086849
申请日：2019-12-20
申请人： SECURE-IC SAS
发明人： LE ROLLAND, Michel , GUILLEY, Sylvain , FACON, Adrien
IPC分类号： G11C7/24 , G11C8/20 , G06F12/14 , G06F13/16 , G11C11/406 , G11C11/408
摘要： Embodiments of the invention provide a memory device (100) comprising a memory (1) comprising at least one chip (2), each chip (2) comprising one or more banks (10) for storing a plurality of bits, each bank (10) comprising a set of rows (13) and columns (14), each row and column comprising a number of bits, the device further comprising a controller (102) configured to generate access commands to the memory(1), an access command identifying an address corresponding to a given row of the memory (1) and a command operation to be performed on said given row, wherein the device further comprises a protection device. The protection device (3) is configured to transform an address, in response to the receipt of an access command identifying said address, into a transformed address. The protection device (3) uses an address storage data structure (30), such as a histogram, to store the transformed address depending on a frequency of access associated with the address, the address storage data structure being reset in response to a memory protection operation (refresh for example) performed in the memory device. The protection device (3) further comprises an access frequency manager (32) configured to determine whether the access frequency associated with an address maintained in the address storage data structure is greater or equal to a threshold, and if so trigger a memory protection operation in the memory (1) from within the memory.

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式