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1. 发明申请

WO2009055146A1 ENCODING AND DECODING TECHNIQUES WITH IMPROVED TIMING MARGIN 审中-公开
标题翻译：编码和解码技术与改进的时序标记
公开(公告)号：WO2009055146A1
公开(公告)日：2009-04-30
申请号：PCT/US2008/074752
申请日：2008-08-29
申请人： RAMBUS INC. , ABBASFAR, Aliazam
发明人： ABBASFAR, Aliazam
IPC分类号： H04L25/49 , H04L7/04
CPC分类号： H04L25/4908 , H04L7/041
摘要： Embodiments of an encoder and a decoder are described. The encoder encodes data into a series of parallel codewords. Each codeword is expressed two sets of logic values (e.g., a set of logic 0s and a set of logic 1s) on two corresponding sets of output nodes, a first set and a second set. The encoder selects a current codeword such that it differs from the immediately preceding codeword by a fixed number of zero-to-one transitions on the first set of nodes and a fixed number of one-to-zero transitions on the second set of nodes. A decoder receives and decodes the codewords by comparing symbols on node pairs for which the symbols expressed in the prior code word were alike and decoding the results of those comparisons.
摘要翻译：描述了编码器和解码器的实施例。编码器将数据编码成一系列并行码字。每个码字在两个对应的输出节点组，第一组和第二组上表示两组逻辑值（例如，一组逻辑0和一组逻辑1）。编码器选择当前码字，使得其与紧接在前的码字不同，第一组节点上的固定数量的零到一个转换和第二组节点上的固定数量的一到零转换。解码器通过比较在先前代码字中表示的符号相似的节点对上的符号并对这些比较的结果进行解码来接收和解码码字。

2. 发明申请

WO2009023302A3 COMMUNICATION USING CONTINUOUS-PHASE MODULATED SIGNALS 审中-公开
公开(公告)号：WO2009023302A3
公开(公告)日：2009-02-19
申请号：PCT/US2008/061846
申请日：2008-04-29
申请人： RAMBUS INC. , ABBASFAR, Aliazam , ARYANFAR, Farshid
发明人： ABBASFAR, Aliazam , ARYANFAR, Farshid
IPC分类号： H04L27/20 , H04L27/22 , H04B7/04 , H04B7/06 , H04B7/08
摘要： Embodiments of a circuit are described. In this circuit, a modulation circuit provides a first modulated electrical signal and a second modulated electrical signal, where a given modulated electrical signal, which can be either the first modulated electrical signal or the second modulated electrical signal, includes minimum-shift keying (MSK) modulated data. Moreover, a first phase-adjustment element, which is coupled to the modulation circuit, sets a relative phase between the first modulated electrical signal and the second modulated electrical signal based on a phase value of the first phase-adjustment element. Additionally, an output interface, which is coupled to the first phase-adjustment element, is coupled to one or more antenna elements which output signals. These signals include a quadrature phase-shift-keying (QPSK) signal corresponding to the first modulated electrical signal and the second modulated electrical signal.

3. 发明申请

WO2011119359A2 CODED DIFFERENTIAL INTERSYMBOL INTERFERENCE REDUCTION 审中-公开
标题翻译：编码差分干扰减少
公开(公告)号：WO2011119359A2
公开(公告)日：2011-09-29
申请号：PCT/US2011/028295
申请日：2011-03-14
申请人： RAMBUS INC. , AMIRKHANY, Amir , ABBASFAR, Aliazam , KAVIANI, Kambiz , BEYENE, Wendemagegnehu , WERNER, Carl, W.
发明人： AMIRKHANY, Amir , ABBASFAR, Aliazam , KAVIANI, Kambiz , BEYENE, Wendemagegnehu , WERNER, Carl, W.
IPC分类号： G11C7/10
CPC分类号： G11C7/1006 , G11C7/02
摘要： Encoder and decoder circuits that encode and decode a series of data words to/from a series of code words. The data words include L symbols. The code words include M symbols, where M is larger than L. A set of tightly coupled M links to convey respective symbols in each of the series of code words. The code words are selected such that between every two consecutive code words in a series of code words, an equal number of transitions from low to high and high to low occur on a subset of the M-links.
摘要翻译：编码器和解码器电路，用于对一系列代码字进行编码和解码一系列数据字。数据字包括L个符号。代码字包括M个符号，其中M大于L.一组紧密耦合的M个链路，用于传送一系列码字中的每一个中的相应符号。选择码字使得在一系列码字中的每两个连续码字之间，在M链路的子集上出现从低到高和高到低的相等数量的转换。

4. 发明申请

WO2009108562A2 CODE-ASSISTED ERROR-DETECTION TECHNIQUE 审中-公开
标题翻译：编码辅助错误检测技术
公开(公告)号：WO2009108562A2
公开(公告)日：2009-09-03
申请号：PCT/US2009/034486
申请日：2009-02-19
申请人： RAMBUS INC. , ABBASFAR, Aliazam
发明人： ABBASFAR, Aliazam
IPC分类号： H03M13/00
CPC分类号： G06F11/08 , G06F11/0793 , G06F11/1004
摘要： Embodiments of a circuit are described. In this circuit, an encoder circuit encodes a set of N symbols as a given codeword in a code space, where the given codeword includes a set of M symbols. M drivers are coupled to the encoder circuit and are coupled to M links in a channel, where a given driver outputs a given symbol in the set of M symbols onto a given link. Moreover, an error-detection circuit, which is coupled to the encoder circuit, generates and stores error-detection information associated with the set of M symbols, where the error- detection information facilitates subsequent probabilistic determination of a type of error during communication of the set of M symbols to another circuit. Additionally, a receiver circuit receives feedback information from the other circuit. This feedback information includes error information about detection of another type of error in the set of M symbols based on characteristics of the code space. Furthermore, control logic performs remedial action based on the feedback information.
摘要翻译：描述了电路的实施例。在该电路中，编码器电路将一组N字符编码为代码空间中的给定码字，其中该给定码字包括一组M symbols个符号。 M个驱动器耦合到编码器电路并且耦合到通道中的M个链路，其中给定的驱动器输出该组M中的给定符号，我>符号到给定的链接。此外，耦合到编码器电路的错误检测电路产生并存储与该组M个符号相关的错误检测信息，其中错误检测信息有助于后续的概率性确定在将该组M个符号传送到另一个电路期间的错误类型。另外，接收器电路从另一个电路接收反馈信息。该反馈信息包括关于根据代码空间的特征检测该组符号中的另一种类型的错误的错误信息。此外，控制逻辑基于反馈信息执行补救行动。

5. 发明申请

WO2008147910A1 ADAPTIVE-GAIN TRANSMITTER 审中-公开
标题翻译：自适应增益变送器
公开(公告)号：WO2008147910A1
公开(公告)日：2008-12-04
申请号：PCT/US2008/064574
申请日：2008-05-22
申请人： RAMBUS INC. , ABBASFAR, Aliazam
发明人： ABBASFAR, Aliazam
IPC分类号： H04L27/26
CPC分类号： H04L27/2614
摘要： A communication circuit includes an input node to receive two adjacent blocks of data symbols. A modulator, coupled to the input node, encodes these blocks of data symbols using an encoding technique into corresponding encoded data symbols. Moreover, a detector is coupled to the modulator. This detector determines peak values for each of the encoded data symbols. Furthermore, an amplifier is coupled to the detector, and an output node is coupled to the amplifier. This amplifier amplifies a given encoded data symbol in the encoded data symbols using an associated symbol-dependent gain prior to transmitting this encoded data symbol. Note that the associated symbol-dependent gain is based on an peak value associated with the given encoded data symbol.
摘要翻译：通信电路包括用于接收数据符号的两个相邻块的输入节点。耦合到输入节点的调制器使用编码技术将这些数据符号块编码成对应的编码数据符号。此外，检测器耦合到调制器。该检测器确定每个编码数据符号的峰值。此外，放大器耦合到检测器，并且输出节点耦合到放大器。该放大器在发送该编码数据符号之前使用相关联的符号依赖增益放大编码数据符号中的给定编码数据符号。注意，相关联的符号相关增益基于与给定编码数据符号相关联的峰值。

6. 发明申请

WO2007127861A2 WIDEBAND CIRCUIT CHARACTERIZATION 审中-公开
标题翻译：宽带电路特性
公开(公告)号：WO2007127861A2
公开(公告)日：2007-11-08
申请号：PCT/US2007/067536
申请日：2007-04-26
申请人： RAMBUS INC. , THE BOARD OF TRUSTEES OF THE UNIVERSITY OF THE LELAND STANFORD JUNIOR UNIVERSITY , ABBASFAR, Aliazam , AMIRKHANY, Amir , SAVOJ, Jafar
发明人： ABBASFAR, Aliazam , AMIRKHANY, Amir , SAVOJ, Jafar
IPC分类号： G06F15/00
CPC分类号： G06F17/5036
摘要： In a method of characterizing a circuit, a test sequence is provided. A response of the circuit to the test sequence is determined. A transfer function that corresponds to the response is determined. The transfer function is decomposed into a plurality of terms. A respective term corresponds to an nth-order term in an expansion of at least 3rd order that corresponds to the transfer function. A characteristic associated with the circuit is simulated using at least one of the terms in the plurality of terms.
摘要翻译：在表征电路的方法中，提供测试序列。确定电路对测试序列的响应。确定与响应对应的传递函数。传递函数被分解为多个项。相应的术语对应于对应于传递函数的至少3阶的扩展中的n阶项。使用多个术语中的至少一个术语来模拟与电路相关联的特性。

7. 发明申请

WO2010014358A3 METHOD AND SYSTEM FOR BALANCING RECEIVE-SIDE SUPPLY LOAD 审中-公开
公开(公告)号：WO2010014358A3
公开(公告)日：2010-02-04
申请号：PCT/US2009/049813
申请日：2009-07-07
申请人： RAMBUS INC. , ABBASFAR, Aliazam
发明人： ABBASFAR, Aliazam
IPC分类号： G06F13/40 , H03K19/00
摘要： Described are digital communication systems that transmit and receive parallel sets of data symbols. Differences between successive sets of symbols induce changes in the current used to express the symbol sets, and thus introduce supply ripple. A receiver adds compensation current to reduce supply ripple. The compensation current is calculated based upon prior data samples rather than the current symbols, and consequently increases the maximum instantaneous current fluctuations between adjacent symbol sets as compared with circuits that do not include the compensation. The frequency response of the power-distribution network filters out the increased data dependence of the local supply current, however, and consequently reduces the fluctuations of total supply current. Some embodiments provide compensation currents for both transmitted and received symbols.

8. 发明申请

WO2013039624A1 OFFSET AND DECISION FEEDBACK EQUALIZATION CALIBRATION 审中-公开
标题翻译：偏差和决策反馈均衡校准
公开(公告)号：WO2013039624A1
公开(公告)日：2013-03-21
申请号：PCT/US2012/050407
申请日：2012-08-10
申请人： RAMBUS INC. , KAVIANI, Kambiz , AMIRKHANY, Amir , WEI, Jason Chia-jen , ABBASFAR, Aliazam
发明人： KAVIANI, Kambiz , AMIRKHANY, Amir , WEI, Jason Chia-jen , ABBASFAR, Aliazam
IPC分类号： H04L27/01 , H04B1/04 , H04B1/12
CPC分类号： H04L25/03057 , H04B1/123 , H04L25/03063 , H04L25/03885
摘要： A decision feedback equalizer is calibrated to compensate for estimated inter- symbol interference in a received signal and offsets of sampling devices. The decision feedback equalizer is configured so that an output signal of a sampling circuit represents a comparison between an input signal and a reference of the sampling circuit under calibration. An input signal is received over a communication channel that includes a predetermined pattern. The predetermined pattern is compared to the output signal to determine an adjusted reference for configuring the sampling circuit that accounts for both offset and inter-symbol interference effects.
摘要翻译：校准反馈均衡器以补偿接收信号中的估计符号间干扰和采样设备的偏移。判定反馈均衡器被配置为使得采样电路的输出信号表示在校准下的输入信号和采样电路的基准之间的比较。在包括预定图案的通信信道上接收输入信号。将预定模式与输出信号进行比较，以确定用于配置考虑到偏移和符号间干扰效应两者的采样电路的调整参考。

9. 发明申请

WO2012033664A2 METHODS AND CIRCUITS FOR PRECISE TERMINATION 审中-公开
标题翻译：精确终止的方法和电路
公开(公告)号：WO2012033664A2
公开(公告)日：2012-03-15
申请号：PCT/US2011/049586
申请日：2011-08-29
申请人： RAMBUS INC. , KAVIANI, Kambiz , AMIRKHANY, Amir , ABBASFAR, Aliazam
发明人： KAVIANI, Kambiz , AMIRKHANY, Amir , ABBASFAR, Aliazam
IPC分类号： H03K19/0175 , G06F13/00
CPC分类号： H03K19/018585 , G06F13/4077
摘要： Described are integrated signal interfaces that include receive amplifiers and termination elements. Termination control circuitry calibrates the impedances through the termination elements to take into account the transconductance of the receive amplifiers. Transconductance bias circuitry can be used to bias the receive amplifiers, and the bias can be derived from a reference voltage. The interfaces can derive the common-mode voltage from received signals as the reference voltage, rather than from a dedicated voltage reference.
摘要翻译：描述的是包括接收放大器和终端元件的集成信号接口。终端控制电路通过端接元件校准阻抗，以考虑接收放大器的跨导。跨导偏置电路可以用于偏置接收放大器，并且可以从参考电压导出偏置。接口可以从接收到的信号中导出共模电压作为参考电压，而不是从专用参考电压。

10. 发明申请

WO2011008394A2 ENCODING DATA USING COMBINED DATA MASK AND DATA BUS INVERSION 审中-公开
标题翻译：使用组合数据掩码和数据总线反演对数据进行编码
公开(公告)号：WO2011008394A2
公开(公告)日：2011-01-20
申请号：PCT/US2010/038556
申请日：2010-06-14
申请人： RAMBUS INC. , ABBASFAR, Aliazam
发明人： ABBASFAR, Aliazam
IPC分类号： G06F13/14 , G06F13/38
CPC分类号： G06F13/4265
摘要： A data encoding scheme for transmission of data from one circuit to another circuit combines DBI encoding and non-DBI encoding and uses a data mask signal to indicate the type of encoding used. The data mask signal in a first state indicates that the data transmitted from one circuit to said another circuit is to be ignored, and the data mask signal in a second state indicates that the data transmitted from one circuit to said another circuit is not to be ignored. If the data mask signal is in the second state, a first subset of the data is encoded with data bus inversion and a second subset of the data is encoded differently from data bus inversion. Such encoding has the advantage that SSO noise is dramatically reduced when the encoded data is transmitted from one circuit to another circuit.
摘要翻译：用于将数据从一个电路传输到另一个电路的数据编码方案结合了DBI编码和非DBI编码，并使用数据掩码信号来指示使用的编码类型。处于第一状态的数据屏蔽信号指示从一个电路发送到所述另一个电路的数据将被忽略，并且处于第二状态的数据屏蔽信号指示从一个电路发送到所述另一个电路的数据不是忽略。如果数据屏蔽信号处于第二状态，则利用数据总线反转对数据的第一子集进行编码，并且对数据的第二子集进行与数据总线反转不同的编码。这种编码的优点是，当编码数据从一个电路传输到另一个电路时，SSO噪声显着降低。

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