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1. 发明申请

WO2006011107A1 METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE OBTAINED WITH SUCH A METHOD 审中-公开
标题翻译：制造半导体器件的方法和采用这种方法获得的半导体器件
公开(公告)号：WO2006011107A1
公开(公告)日：2006-02-02
申请号：PCT/IB2005/052382
申请日：2005-07-18
申请人： KONINKLIJKE PHILIPS ELECTRONICS N.V. , MEUNIER-BEILLARD, Philippe , RAVIT, Claire , DONKERS, Johannes, J., T., M. , MAGNEE, Petrus, H., C, , HIJZEN, Erwin , VERHEIJEN, Marcelino, A. , PONOMAREV, Youri , LOO, Josine, J., G., P.
发明人： MEUNIER-BEILLARD, Philippe , RAVIT, Claire , DONKERS, Johannes, J., T., M. , MAGNEE, Petrus, H., C, , HIJZEN, Erwin , VERHEIJEN, Marcelino, A. , PONOMAREV, Youri , LOO, Josine, J., G., P.
IPC分类号： H01L29/786
CPC分类号： H01L29/78687 , H01L21/02381 , H01L21/0245 , H01L21/02532 , H01L21/0262 , H01L21/02639 , H01L21/02647 , H01L29/66742 , H01L29/7842 , H01L29/78603
摘要： The invention relates to a method of manufacturing a semiconductor device (10) in which a semiconductor body (11) comprising silicon is provided, at a surface thereof, with a first semiconductor layer (1) having a lattice of a mixed crystal of silicon and germanium, which lattice is substantially relaxed, and on top of the first semiconductor layer (1) a second semiconductor layer (2) is situated comprising strained silicon, in which layer (2) an active part of the semiconductor device (10) is formed, and wherein the first semiconductor layer (1) is formed above a patterned insulating layer (200) which is present in the semiconductor body (11) of silicon. According to the invention the method is characterized in that the insulating layer (200) is provided on top of the semiconductor body (11) and patterned such as to comprise a window (21) bordering a region (20) of the insulating layer, and in that the first semiconductor layer (1) is directly grown on the part of the semiconductor body (11) below the window (21) and the region (20) of the insulating layer is covered with the first semiconductor layer by lateral overgrowth. In this way either a substantially defect-free strain-relaxed layer (1) is obtained or a strain-relaxed layer (1) of which at least the part that, viewed in projection, is above the insulating region (20) is substantially defect-free.
摘要翻译：本发明涉及一种制造半导体器件（10）的方法，其中在其表面上设置包括硅的半导体本体（11），其中第一半导体层（1）具有硅的混晶晶格和锗，其格子基本上松弛，并且在第一半导体层（1）的顶部上，包括应变硅的第二半导体层（2），其中层（2）形成半导体器件（10）的有源部分，并且其中所述第一半导体层（1）形成在存在于所述硅的半导体本体（11）中的图案化绝缘层（200）的上方。根据本发明，所述方法的特征在于，绝缘层（200）设置在半导体本体（11）的顶部并且被图案化以包括与绝缘层的区域（20）接合的窗口（21），以及因为第一半导体层（1）直接在窗口（21）下面的半导体本体（11）的一部分上生长，并且绝缘层的区域（20）被侧向过度生长覆盖在第一半导体层上。以这种方式，获得基本上无缺陷的应变松弛层（1）或其中至少从投影中观察到的部分在绝缘区域（20）上方的至少部分基本上是缺陷的应变松弛层（1） -自由。

2. 发明申请

WO2006109208A2 METHOD OF FABRICATING A HETEROJUNCTION BIPOLAR TRANSISTOR 审中-公开
标题翻译：制备异相双极晶体管的方法
公开(公告)号：WO2006109208A2
公开(公告)日：2006-10-19
申请号：PCT/IB2006/051005
申请日：2006-04-03
申请人： KONINKLIJKE PHILIPS ELECTRONICS N.V. , MEUNIER-BEILLARD, Philippe , DONKERS, Johannes, J., T., M. , HIJZEN, Erwin , MELAI, Joost
发明人： MEUNIER-BEILLARD, Philippe , DONKERS, Johannes, J., T., M. , HIJZEN, Erwin , MELAI, Joost
CPC分类号： H01L29/66242 , H01L29/16 , H01L29/7378
摘要： The invention provides a method for fabricating a heterojunction bipolar transistor with a base connecting region (23), which is formed self-aligned to a base region (7) without applying photolithographic techniques. Further, a collector connecting region (31) and an emitter region (29) are formed simultaneously and self-aligned to the base connecting region (23) without applying photolithographic techniques.
摘要翻译：本发明提供了一种用于制造具有基极连接区域（23）的异质结双极晶体管的方法，该基极连接区域（23）在不施加光刻技术的情况下与基极区域（7）自对准地形成。此外，在不使用光刻技术的情况下，集电极连接区域（31）和发射极区域（29）同时形成并且与基底连接区域（23）自对准。

3. 发明申请

WO2006077502A1 BIPOLAR TRANSISTOR AND METHOD OF FABRICATING THE SAME 审中-公开
标题翻译：双极晶体管及其制造方法
公开(公告)号：WO2006077502A1
公开(公告)日：2006-07-27
申请号：PCT/IB2006/050107
申请日：2006-01-12
申请人： KONINKLIJKE PHILIPS ELECTRONICS N.V. , DONKERS, Johannes, J., T., M. , VAN NOORT, Wibo, D. , MEUNIER-BEILLARD, Philippe , NUTTINCK, Sebastien , HIJZEN, Erwin , NEUILLY, François
发明人： DONKERS, Johannes, J., T., M. , VAN NOORT, Wibo, D. , MEUNIER-BEILLARD, Philippe , NUTTINCK, Sebastien , HIJZEN, Erwin , NEUILLY, François
IPC分类号： H01L21/31 , H01L29/732 , H01L29/737
CPC分类号： H01L29/66242 , H01L29/66272 , H01L29/732 , H01L29/7378
摘要： The invention provides a bipolar transistor with a reduced collector series resistance integrated in a trench (4, 44) of a standard CMOS shallow trench isolation region. The bipolar transistor includes a collector region (6, 34) manufactured in one fabrication step, therefore having a shorter conductive path with a reduced collector series resistance, improving the high frequency performance of the bipolar transistor. The bipolar transistor further includes a base region (8, 22, 38) with a first part on a selected portion of the collector region (6, 34), which is on the bottom of the trench (4, 44), and an emitter region (10, 24, 39) on a selected portion of the first part of the base region (8, 22, 38). A base contact (11, 26, 51) electrically contacts the base region (8, 22, 38) on a second part of the base region (8, 22, 38), which is on an insulating region (2, 42). The collector region (6, 34) is electrically contacted on top of a protrusion (5, 45) with a collector contact (13, 25, 50).
摘要翻译：本发明提供了集成在标准CMOS浅沟槽隔离区的沟槽（4,44）中的集电极串联电阻降低的双极晶体管。双极晶体管包括在一个制造步骤中制造的集电极区域（6,34），因此具有较短的集电极串联电阻的导电路径，从而改善了双极晶体管的高频性能。双极晶体管还包括在沟槽（4,44）的底部上的集电极区域（6,34）的选定部分上的第一部分的基极区域（8,22,38）和发射极区域（10,24,39）在基区（8,22,38）的第一部分的选定部分上。在绝缘区域（2,42）上的基极区域（8,22,38）的第二部分上的基极接触部分（11,26,31）与基极区域（8,22,38）电接触。集电区域（6,34）与突起（5,45）的顶部与集电极接触（13,25,50）电接触。

4. 发明申请

WO2007057803A1 METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE OBTAINED WITH SUCH A METHOD 审中-公开
标题翻译：制造半导体器件的方法和采用这种方法获得的半导体器件
公开(公告)号：WO2007057803A1
公开(公告)日：2007-05-24
申请号：PCT/IB2006/053996
申请日：2006-10-29
申请人： KONINKLIJKE PHILIPS ELECTRONICS N.V. , MELAI, Joost , HIJZEN, Erwin , MEUNIER-BEILLARD, Philippe , DONKERS, Johannes, J., T., M.
发明人： MELAI, Joost , HIJZEN, Erwin , MEUNIER-BEILLARD, Philippe , DONKERS, Johannes, J., T., M.
IPC分类号： H01L21/331
CPC分类号： H01L29/66242 , H01L29/66287
摘要： The invention relates to a method of manufacturing a semiconductor device (10) with a substrate (11) and a semiconductor body (12) which is provided with at least one bipolar transistor having an emitter region (1), a base region (2) and a collector region (3), wherein in the semiconductor body (12) a first semiconductor region (13) is formed that forms one (3) of the collector and emitter regions (1,3) and on the surface of the semiconductor body (12) a stack of layers is formed comprising a first insulating layer (4), a polycrystalline semiconductor layer (5) and a second insulating layer (6) in which stack an opening (7) is formed, after which by non-selective epitaxial growth a further semiconductor layer (22) is deposited of which a monocrystalline horizontal part on the bottom of the opening (7) forms the base region (2) and of which a polycrystalline vertical part (2A) on a side face of the opening (7) is connected to the polycrystalline semiconductor layer (5), after which spacers (S) are formed parallel to the side face of the opening (7) and a second semiconductor region (31) is formed between said spacers (S) forming the other one (1) of the emitter and collector regions (1,3). According to the invention the above method is characterized in that before the further semiconductor layer (22) is deposited, the second insulating layer (6) is provided with an end portion (6A) that viewed in projection overhangs an end portion (5A) of the underlying semiconductor layer (5). In this way bipolar transistor devices can be obtained with good high frequency properties in a cost effective manner.
摘要翻译：本发明涉及一种制造半导体器件（10）的方法，所述半导体器件（10）具有衬底（11）和半导体本体（12），所述半导体器件（12）具有至少一个具有发射极区域（1），基极区域（2），和集电极区域（3），其中在所述半导体本体（12）中形成第一半导体区域（13），所述第一半导体区域形成所述集电极和发射极区域（1,3）中的一个（3）并且在所述半导体主体（12）形成一叠层，其包括形成有开口（7）的第一绝缘层（4），多晶半导体层（5）和第二绝缘层（6），之后通过非选择性外延生长沉积另外的半导体层（22），其中开口（7）的底部上的单晶水平部分形成基部区域（2），并且在该开口的侧面上具有多晶垂直部分（2A）（7）连接到多晶半导体层（5），之后是间隔（S）形成为平行于开口（7）的侧面，并且在形成发射极和集电极区域（1,3）的另一个（1）的所述间隔物（S）之间形成第二半导体区域（31））。根据本发明，上述方法的特征在于，在沉积另外的半导体层（22）之前，第二绝缘层（6）设置有端部（6A），该端部在突出部分中突出伸出端部（5A）底层半导体层（5）。以这种方式，可以以成本有效的方式获得具有良好高频特性的双极晶体管器件。

5. 发明申请

WO2006109221A3 LATERAL BIPOLAR TRANSISTOR 审中-公开
公开(公告)号：WO2006109221A3
公开(公告)日：2006-10-19
申请号：PCT/IB2006/051045
申请日：2006-04-05
申请人： KONINKLIJKE PHILIPS ELECTRONICS N.V. , MEUNIER-BEILLARD, Philippe , HUETING, Raymond, J., E. , DONKERS, Johannes, J., T., M. , HIJZEN, Erwin
发明人： MEUNIER-BEILLARD, Philippe , HUETING, Raymond, J., E. , DONKERS, Johannes, J., T., M. , HIJZEN, Erwin
IPC分类号： H01L21/331 , H01L29/735 , H01L27/06 , H01L21/8249
摘要： The invention provides a CMOS-based lateral bipolar transistor and a method of fabricating the same. A CMOS device forms the basis of the CMOS-based lateral bipolar transistor. The CMOS device is provided on a silicon, SOI or SSOI substrate and comprises a source and drain region, CMOS spacers (9, 10) and a removed gate electrode. An emitter region (41) and a collector region (45) are disposed in the source and drain regions, and a base region (43), comprising SiGe or p-type silicon, is provided adjacent to the emitter region (41) and the collector region (45). The base region (43) has a relatively large exposed area, because it is not covered by the, formerly removed, gate electrode. The base resistance may be reduced by providing a metal layer (29) and an electrical contact (33) on the exposed area of the base region (43).

6. 发明申请

WO2007144828A1 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SUCH A DEVICE 审中-公开
标题翻译：半导体器件及其制造方法
公开(公告)号：WO2007144828A1
公开(公告)日：2007-12-21
申请号：PCT/IB2007/052220
申请日：2007-06-12
申请人： KONINKLIJKE PHILIPS ELECTRONICS N.V. , INTERUNIVERSITAIR MICROELEKTRONICA CENTRUM VZW , HIJZEN, Erwin , MELAI, Joost , VAN NOORT, Wibo, D. , DONKERS, Johannes, J., T., M. , MEUNIER-BEILLARD, Philippe , PIONTEK, Andreas, M. , CHOI, Li Jen , VAN HUYLENBROECK, Stefaan
发明人： HIJZEN, Erwin , MELAI, Joost , VAN NOORT, Wibo, D. , DONKERS, Johannes, J., T., M. , MEUNIER-BEILLARD, Philippe , PIONTEK, Andreas, M. , CHOI, Li Jen , VAN HUYLENBROECK, Stefaan
IPC分类号： H01L27/06 , H01L21/8249
CPC分类号： H01L27/0623 , H01L21/8249 , H01L29/456 , H01L29/66242 , H01L29/7378
摘要： The invention relates to a semiconductor device (10) with a substrate (11) and a semiconductor body (1) comprising a bipolar transistor with in that order a collector region (2), a base region (3), and an emitter region (4), wherein the semiconductor body comprises a projecting mesa (5) comprising at least a portion of the collector region (2) and the base region (3), which mesa is surrounded by an isolation region (6). According to the invention, the semiconductor device (10) also comprises a field effect transistor with a source region, a drain region, an interposed channel region, a superimposed gate dielectric (7), and a gate region (8), which gate region (8) forms a highest part of the field effect transistor, and the height of the mesa (5) is greater than the height of the gate region (8). This device can be manufactured inexpensively and easily by a method according to the invention, and the bipolar transistor can have excellent high-frequency characteristics.
摘要翻译：本发明涉及具有基板（11）和半导体本体（1）的半导体器件（10），该半导体器件（1）包括双极晶体管，依次具有集电极区域（2），基极区域（3）和发射极区域 4），其中半导体主体包括包括集电极区域（2）和基极区域（3）的至少一部分的突出台面（5），该台面由隔离区域（6）包围。根据本发明，半导体器件（10）还包括具有源极区域，漏极区域，插入沟道区域，叠加栅极电介质（7）和栅极区域（8）的场效应晶体管，该栅极区域（8）形成场效应晶体管的最高部分，台面（5）的高度大于栅极区域（8）的高度。该装置可以通过根据本发明的方法廉价且容易地制造，并且双极晶体管可以具有优异的高频特性。

7. 发明申请

WO2006117712A1 METHOD OF FABRICATING A BIPOLAR TRANSISTOR 审中-公开
标题翻译：制造双极晶体管的方法
公开(公告)号：WO2006117712A1
公开(公告)日：2006-11-09
申请号：PCT/IB2006/051262
申请日：2006-04-24
申请人： KONINKLIJKE PHILIPS ELECTRONICS N.V. , MEUNIER-BEILLARD, Philippe , HIJZEN, Erwin , DONKERS, Johannes, J., T., M. , NEUILLY, Francois
发明人： MEUNIER-BEILLARD, Philippe , HIJZEN, Erwin , DONKERS, Johannes, J., T., M. , NEUILLY, Francois
IPC分类号： H01L21/331
CPC分类号： H01L29/66272 , H01L29/0821
摘要： A method of fabricating a bipolar transistor in a first trench (11) is disclosed wherein only one photolithographic mask is applied which forms a first trench (11) and a second trench (12). A collector region (21) is formed self-aligned in the first trench (11) and the second trench (12). A base region (31) is formed self-aligned on a portion of the collector region (21), which is in the first trench (11). An emitter region (41) is formed self-aligned on a portion of the base region (31). A contact to the collector region (21) is formed in the second trench (12) and a contact to the base region (31) is formed in the first trench (11). The fabrication of the bipolar transistor may be integrated in a standard CMOS process.
摘要翻译：公开了在第一沟槽（11）中制造双极晶体管的方法，其中仅施加一个形成第一沟槽（11）和第二沟槽（12）的光刻掩模。集电极区域（21）在第一沟槽（11）和第二沟槽（12）中自对准地形成。基部区域（31）在位于第一沟槽（11）中的集电极区域（21）的一部分上自对准地形成。发射极区域（41）在基极区域（31）的一部分上自对准地形成。在所述第二沟槽（12）中形成与所述集电极区域（21）的接触，并且在所述第一沟槽（11）中形成与所述基极区域（31）的接触。双极晶体管的制造可以集成在标准CMOS工艺中。

8. 发明申请

WO2007088494A1 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SUCH A DEVICE 审中-公开
标题翻译：半导体器件及其制造方法
公开(公告)号：WO2007088494A1
公开(公告)日：2007-08-09
申请号：PCT/IB2007/050210
申请日：2007-01-22
申请人： NXP B.V. , DONKERS, Johannes, J., T., M. , MEUNIER-BEILLARD, Philippe , HIJZEN, Erwin
发明人： DONKERS, Johannes, J., T., M. , MEUNIER-BEILLARD, Philippe , HIJZEN, Erwin
IPC分类号： H01L21/336 , H01L21/8249
CPC分类号： H01L29/66628 , H01L21/8249 , H01L27/0623 , H01L29/6653 , H01L29/6656
摘要： The invention relates to a semiconductor device (10) with a substrate (12) and a semiconductor body (11) of silicon that is provided at one location (A) with a field effect or bipolar transistor (Tl) with a semiconductor region which forms part of the transistor (Tl) and which comprises a source or drain region of the field effect transistor or a base region of the bipolar transistor and which is adjacent to the surface of the semiconductor body (11), which semiconductor region is provided with an epitaxially thickened region. According to the invention the surface of the semiconductor body (11) is provided with another epitaxially thickened region (1) at a location (B) other than the location where the transistor is present, and said other epitaxially thickened region is provided with at least one pn-junction (2,3). If the device is provided with two pn-junctions (2,3) it allows advantageously the integration of a bipolar transistor (T2) into a device with a MOSFET (Tl). The pn-junctions in the epitaxially thickened region of the latter can be removed without difficulty, e.g. by overdoping. The invention also relates to a method of manufacturing such a device (10).
摘要翻译：本发明涉及一种半导体器件（10），其具有衬底（12）和硅的半导体本体（11），所述半导体本体（11）设置在具有场效应的一个位置（A）或具有形成半导体区域的半导体区域（Tl）晶体管（T1）的一部分，并且其包括场效应晶体管的源极或漏极区域或双极晶体管的基极区域，并且与半导体本体（11）的表面相邻，该半导体区域设置有外延增厚区域。根据本发明，半导体本体（11）的表面在除了存在晶体管的位置之外的位置（B）处设置有另外的外延加厚区域（1），并且所述其它外延加厚区域至少设置有一个pn结（2,3）。如果该器件具有两个pn结（2,3），则有利地将双极晶体管（T2）集成到具有MOSFET（T1）的器件中。后者的外延增稠区域中的pn结可以毫无困难地被去除，例如，通过过度使用本发明还涉及制造这种装置（10）的方法。

9. 发明申请

WO2008001249A1 METHOD OF MANUFACTURING A BIPOLAR TRANSISTOR AND BIPOLAR TRANSITOR OBTAINED THEREWITH 审中-公开
标题翻译：制造双极晶体管的方法和获得的双极晶体管
公开(公告)号：WO2008001249A1
公开(公告)日：2008-01-03
申请号：PCT/IB2007/052226
申请日：2007-06-12
申请人： NXP B.V. , HIJZEN, Erwin , MEUNIER-BEILLARD, Philippe , DONKERS, Johannes, J., T., M.
发明人： HIJZEN, Erwin , MEUNIER-BEILLARD, Philippe , DONKERS, Johannes, J., T., M.
IPC分类号： H01L21/331
CPC分类号： H01L29/66287 , H01L29/66242
摘要： The invention relates to a method of manufacturing a semiconductor device (10) comprising a substrate (12) and a silicon semiconductor body (11) and comprising a bipolar transistor with an emitter region (1) of a first conductivity type, a base region (2) of a second conductivity type opposite to the first conductivity type, and a collector region (3) of the first conductivity type, on the surface of the semiconductor body (11) in which the collector region (3) is formed at least an epitaxial semiconductor layer (20,21,22) being deposited in which the base region (2) is formed, on top of this an etch stop layer (15) being deposited on which a silicon low-crystalline semiconductor layer (24) is deposited in which a connection zone of the base region (2) is formed and in which at the location of an emitter region (1) to be formed an opening (7) is provided running up to the etch stop layer (15), a portion of the etch stop layer (15) covering the opening (7) being removed by means of etching and also an adjoining portion of the etch stop layer (15), a hollow being created underneath the silicon low-crystalline semiconductor layer (24) adjoining and connected the opening (7), whereinafter a high-crystalline semiconductor layer (5) is formed within the hollow. In a method according to the invention the formation of the high-crystalline semiconductor layer (5) is carried out in such a way that a part of the surface of the semiconductor body (11) adjoining the opening (7) is kept free from the high-crystalline semiconductor layer (5). In this way a high-quality device (10) is obtained in easy manner. The relevant surface is kept free using a cover layer (6) or in a preferred manner even without the use of such a layer.
摘要翻译：本发明涉及一种制造半导体器件（10）的方法，该半导体器件（10）包括衬底（12）和硅半导体本体（11），并且包括具有第一导电类型的发射极区域（1），基极区域 2）与第一导电类型相反的第二导电类型和第一导电类型的集电极区域（3），其中集电区域（3）至少形成在半导体本体（11）的表面上，外延半导体层（20,21,22）被沉积在其中形成有基极区域（2）的上方，沉积有沉积有硅低温半导体层（24）的蚀刻停止层（15）在其中形成基部区域（2）的连接区域，并且其中在要形成开口（7）的发射极区域（1）的位置处设置有延伸到蚀刻停止层（15）的部分通过蚀刻去除覆盖开口（7）的蚀刻停止层（15）以及蚀刻停止层（15）的相邻部分，在邻接和连接开口（7）的硅低温半导体层（24）下方形成中空，其后，高结晶半导体层（5）为形成在空心中。在根据本发明的方法中，高结晶半导体层（5）的形成是这样一种方式进行的：半导体本体（11）的与开口（7）相邻的表面的一部分保持与高结晶半导体层（5）。以这种方式，以容易的方式获得了高质量的装置（10）。使用覆盖层（6）或以优选的方式即使不使用这种层也可以使相关表面保持自由。

10. 发明申请

WO2009141753A1 A METHOD OF MANUFACTURING A BIPOLAR TRANSISTOR SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICES OBTAINED THEREBY 审中-公开
标题翻译：制造双极晶体管半导体器件和获得的半导体器件的方法
公开(公告)号：WO2009141753A1
公开(公告)日：2009-11-26
申请号：PCT/IB2009/051931
申请日：2009-05-11
申请人： NXP B.V. , MEUNIER-BEILLARD, Philippe , HIJZEN, Erwin , DONKERS, Johannes, J., T., M.
发明人： MEUNIER-BEILLARD, Philippe , HIJZEN, Erwin , DONKERS, Johannes, J., T., M.
IPC分类号： H01L21/331 , H01L29/737
CPC分类号： H01L29/7378 , H01L29/66242
摘要： Methods for manufacturing a bipolar transistor semiconductor device are described, along with devices fabricated in accordance with the methods. The methods include the steps of forming a stack of layers over a semiconductor body comprising a window definition layer (18,38), a layer (20) of semiconductor material, a first insulating layer (22), and a second insulating layer (24) which is selectively etchable with respect to the first insulating layer. A trench (26) is then etched into the stack down to the window definition layer. The portion of the trench extending through the second insulating layer is widened to form a wider trench portion (28) therethrough. A window (36) is defined in the window definition layer which is aligned with the wider trench portion, and serves to define the base-collector or base-emitter junction in the finished device.
摘要翻译：描述了制造双极晶体管半导体器件的方法以及根据该方法制造的器件。所述方法包括以下步骤：在半导体主体上形成层叠层，其包括窗口界定层（18,38），半导体材料层（20），第一绝缘层（22）和第二绝缘层（24）），其相对于第一绝缘层可选择性地蚀刻。然后将沟槽（26）蚀刻到堆叠中，直到窗口定义层。延伸穿过第二绝缘层的沟槽的部分被加宽以形成穿过其中的较宽的沟槽部分（28）。在窗口定义层中限定窗口（36），其与较宽的沟槽部分对准，并且用于限定最终器件中的基极 - 集电极或基极 - 发射极结。

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