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    • 1. 发明申请
    • INTEGRITY CONTROL FOR DATA STORED IN A NON-VOLATILE MEMORY
    • 在非易失性存储器中存储的数据的完整性控制
    • WO2004109704A1
    • 2004-12-16
    • PCT/IB2004/050774
    • 2004-05-26
    • KONINKLIJKE PHILIPS ELECTRONICS N.V.JOCHEMSEN, RobertLAMBERT, NicolaasFONTIJN, Wilhelmus, F., J.DENISSEN, Adrianus, J., M.
    • JOCHEMSEN, RobertLAMBERT, NicolaasFONTIJN, Wilhelmus, F., J.DENISSEN, Adrianus, J., M.
    • G11C11/16
    • G06F11/1068G11C11/1675G11C11/1695G11C29/08G11C2029/4402
    • The present invention relates to a write controller (10) for a memory with a plurality of non-volatile storage cells, a read controller for a memory with a plurality of non­volatile storage cells, to a combined write/read controller, to a solid state device comprising a memory with a plurality of non-volatile storage cells, a programmer device for writing a binary code to a non-volatile memory, to a method for writing data comprising at least one input bit to a memory having non-volatile storage cells, and to a method for controlling the integrity of data comprising at least one input bit stored in non-volatile storage cells of a memory. The invention provides a reliable detection of changes that have occurred to the content of a non-volatile memory. The basic concept of the present invention is to extend information stored in a non-volatile memory by at least one checking bit. The checking bit is allocated to one code bit, or to each of a plurality of code bits. The allocation is preferably reflected in an allocation of memory cells storing the input and code bits.
    • 本发明涉及一种用于具有多个非易失性存储单元的存储器的写入控制器(10),具有多个非易失性存储单元的存储器的读取控制器,组合的写/读控制器,固态 包括具有多个非易失性存储单元的存储器,用于将二进制代码写入非易失性存储器的编程器装置,用于将包括至少一个输入位的数据写入到具有非易失性存储单元的存储器的方法 以及用于控制数据的完整性的方法,包括存储在存储器的非易失性存储单元中的至少一个输入位。 本发明提供了对非易失性存储器的内容所发生的变化的可靠检测。 本发明的基本概念是通过至少一个检查位来扩展存储在非易失性存储器中的信息。 检查位分配给一个码位,或分配给多个码位中的每一个。 该分配优选地反映在存储输入和码位的存储单元的分配中。
    • 3. 发明申请
    • METHOD OF INCREASING BOOT-UP SPEED
    • 增加启动速度的方法
    • WO2005071538A1
    • 2005-08-04
    • PCT/IB2005/050007
    • 2005-01-03
    • KONINKLIJKE PHILIPS ELECTRONICS N.V.LAMBERT, NicolaasJOCHEMSEN, RobertFONTIJN, Wilhelmus, F., J.DENISSEN, Adrianus, J., M.
    • LAMBERT, NicolaasJOCHEMSEN, RobertFONTIJN, Wilhelmus, F., J.DENISSEN, Adrianus, J., M.
    • G06F9/445
    • G06F12/0866G06F9/4406
    • There is provided a method of increasing boot-up speed in a computer system (10). The system (10) includes computing devices (20) for processing data and a data store (60) coupled thereto for providing data to and receiving data from the devices (20). The store (60) is operable to write and/or read data in several regions (T1, T2, T3) of a data medium (200). Access between the regions is subject to associated jump delays (SK1/2, SK2/3; SK1/3, SL3/2). The store (60) includes a cache (320) for temporarily storing data read from and/or for writing data to the medium (200). On initial boot-up of the system (20), a log is made of a sequence in which the regions (T1, T2, T3) are accessed. Moreover, on subsequent boot-up of the system (10), the log is used to store data read from the medium (200) temporarily in the cache (310, 320) so as to provide for a more temporally efficient sequence of accessing the regions (T1, T2, T3) for speeding up said subsequent boot-up.
    • 提供了一种在计算机系统(10)中增加启动速度的方法。 系统(10)包括用于处理数据的计算设备(20)和与其耦合的数据存储(60),用于向设备(20)提供数据和从设备(20)接收数据。 存储器(60)可操作以在数据介质(200)的若干区域(T1,T2,T3)中写入和/或读取数据。 区域之间的通道会受到相关的跳转延迟(SK1 / 2,SK2 / 3; SK1 / 3,SL3 / 2)的影响。 存储器(60)包括用于临时存储从数据读取和/或写入到介质(200)的数据的高速缓存(320)。 在系统(20)的初始启动时,日志由访问区域(T1,T2,T3)的序列构成。 此外,在系统(10)的后续启动时,日志用于将从媒体(200)中读取的数据临时存储在高速缓存(310,320)中,以便提供更时间有效的访问序列 区域(T1,T2,T3),用于加速所述后续启动。
    • 6. 发明申请
    • UNIVERSAL MEMORY DEVICE HAVING A PROFIL STORAGE UNIT
    • 具有专业存储单元的通用存储器件
    • WO2004084231A1
    • 2004-09-30
    • PCT/IB2004/050269
    • 2004-03-17
    • KONINKLIJKE PHILIPS ELECTRONICS N.V.LAMBERT, NicolaasDENISSEN, Adrianus, J., M.FONTIJN, Wilhelmus, F., J.JOCHEMSEN, Robert
    • LAMBERT, NicolaasDENISSEN, Adrianus, J., M.FONTIJN, Wilhelmus, F., J.JOCHEMSEN, Robert
    • G11C16/22
    • G06F21/78G06F21/79G06F2221/2141G11C7/1045G11C7/24G11C16/22
    • A universal memory device is presented that provides adaptability to existing hardware and software environments. The memory can "mimic" existing memory technology combining the advantages of integration all memory capacity in to one single technology and still providing the implicit protections and access characteristics known from the different existing memory technologies. The memory device comprises a memory having a plurality of low-latency, rewritable, non-volatile memory cells forming at least one memory section, a profile storage unit connected with said memory and comprising access information allocated to at least one set of request information elements (r: quest profile), such that said access information indicates whether a request for access to said memory (access request), said access request having said request profile, is to be allowed or rejected, and an access control unit communicating with said profile storage unit and said memory, and adapted to allow or reject an incoming access request in dependence on the access information allocated to the request profile of the access request.
    • 提出了一种提供对现有硬件和软件环境的适应性的通用存储器件。 存储器可以“模拟”现有的存储器技术,结合将所有存储器容量集成到一个单一技术中的优点,并且仍然提供从不同现有存储器技术已知的隐式保护和访问特性。 存储器件包括具有多个低延迟,可重写,非易失性存储器单元的存储器,其形成至少一个存储器部分,与所述存储器连接的简档存储单元,并且包括分配给至少一组请求信息元素的访问信息 (r:任务简档),使得所述访问信息指示是否允许或拒绝对访问所述存储器(访问请求)的所述访问请求的请求以及与所述简档通信的访问控制单元 存储单元和所述存储器,并且适于根据分配给访问请求的请求简档的访问信息允许或拒绝传入访问请求。