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1. 发明申请

WO2006056365A2 METHOD FOR IDENTIFICATION AND ANALYSIS OF MEASURING VALUES OBTAINED WITH THE AID OF AN ANALYSIS DEVICE FROM A MULTI-COMPONENT MIXTURE OF MATERIALS IN VARIABLE ENVIRONMENTAL CONDITIONS (GLOBAL) 审中-公开
标题翻译： METHOD FOR辨识与分析单元分析从获得的环境条件变化的一种多组分物质混合物的测量的环境（GLOBAL）
公开(公告)号：WO2006056365A2
公开(公告)日：2006-06-01
申请号：PCT/EP2005012357
申请日：2005-11-18
申请人： KARLSRUHE FORSCHZENT , SEIFERT ROLF , KELLER HUBERT , HETZNECKER ALEXANDER , SCHINDLER VOLKER , KOHLER HEINZ , SCHOENAUER ULRICH , FRANK KEVIN
发明人： SEIFERT ROLF , KELLER HUBERT , HETZNECKER ALEXANDER , SCHINDLER VOLKER , KOHLER HEINZ , SCHOENAUER ULRICH , FRANK KEVIN
CPC分类号： G01N33/0034 , G01N33/0006 , G01N33/0047 , G01N2201/129
摘要： Disclosed is a method for analysis of measuring values which are obtained from an environment with the aid of an analysis device from a multi-component mixture of materials, an n-component mixture of materials, thus designated as the target material. The method is used to classify and identify materials and to prove whether the mixture of materials thus analyzed is in fact the target material, and optionally to determine individual concentrations c i with i = 1, , n in variable envinronmental conditions.
摘要翻译：有分析与从多组分混合物，将其简称为由于正组件材料混合物的意图的目标物质的环境中的测定值的分析器所获得的方法，进行说明。的方法用于材料分类/ -Identification从而检测是否它实际上是检查围绕目标物质Steff混合物时，并且可选地，以确定各个浓度c _{I 其中i = 1，... n，其中变量的环境条件。}

2. 发明申请

WO2004051860A3 TRANSMISSION CONFIGURATION FOR TRANSMITTING SIGNALS AND D/A CONVERTER CIRCUITS THEREFOR 审中-公开
标题翻译：传输系统信号和d / A转换器电路传输为此
公开(公告)号：WO2004051860A3
公开(公告)日：2004-09-02
申请号：PCT/AT0300355
申请日：2003-11-27
申请人： SCHINDLER VOLKER
发明人： SCHINDLER VOLKER
IPC分类号： H03M1/68 , H03M1/82 , H03M3/00 , G08C19/02
CPC分类号： H03M1/68 , H03M1/822 , H03M3/358 , H03M3/506 , H03M7/3026
摘要： The invention relates to a transmission configuration for transmitting signals, particularly measurement or control signals in analog form, comprising a direct current (DC) D/A converter circuit (12') for a DC useful signal. Said D/A converter circuit contains an input memory, e.g. a register (23), a digital modulator, particularly a sigma-delta modulator (57) and an analog low-pass (25'). The transmission configuration also comprises an alternating current (AC) D/A converter circuit (13') for a modulated AC modem signal that contains a digital pulse-width modulator (62) and an analog filter (33'). In the DC D/A converter circuit (12'), a digital low-pass filter (47) is assigned to the digital modulator and in the AC D/A converter circuit (13'), an analog adder (63) is connected down from the pulse-width modulator (62) that converts the modem signal into a 1 bit signal. Another signal to be added, e.g. a direct current signal that is activated during the quiescent state, an MSB signal or a clock signal, is fed to said analog adder.
摘要翻译：为模拟形式用于DC-用户信号，输入存储器，例如发送信号，在特定的测量和控制信号，以直流（DC）d / A转换器电路（12“）的传动装置一个寄存器（23），数字调制器，特别是Σ-Δ调制器（57），以及模拟低通（25 '），以及与交流电（AC）d / A转换电路（13' 用于调制的AC调制解调信号），其包括数字脉宽调制器（62）和模拟滤波器（33'）; 在DC-d / A转换电路（12“）的数字低通滤波器（47）被分配到数字调制器，在AC-d / A转换电路（13”）是脉冲宽度调制器（62）中，调制解调器信号转换成 1位信号将下游的模拟加法器（63）转换为另一个要加总的信号，例如在空闲DC信号期间被激活，提供MSB信号或时钟信号。

3. 发明申请

WO9625720A3 INTEGRATED CIRCUIT 审中-公开
标题翻译：集成电路
公开(公告)号：WO9625720A3
公开(公告)日：1996-09-26
申请号：PCT/GB9600295
申请日：1996-02-12
申请人： GEN INFORMATION SYSTEMS LTD , DIGICASH B V , INST ANGEWANDTE INFORMATIONSVE , SHELTON CHRISTOPHER DAVID , KELLY MARTIN SEAN , ORME WILLIAM EDWARD , SCHILDER MARIUS PAUL MICHIEL , FERGUSON NIELS THOMAS , CHAUM DAVID , MAYERWIESER WOLFGANG , POSCH REINHARD , SCHINDLER VOLKER
发明人： SHELTON CHRISTOPHER DAVID , KELLY MARTIN SEAN , ORME WILLIAM EDWARD , SCHILDER MARIUS PAUL MICHIEL , FERGUSON NIELS THOMAS , CHAUM DAVID , MAYERWIESER WOLFGANG , POSCH REINHARD , SCHINDLER VOLKER
IPC分类号： G06K19/073 , G07F7/08 , G07F7/10
CPC分类号： G07F7/1008 , G06K19/073 , G06Q20/341 , G06Q20/3576
摘要： A single chip processor for use in a smart card (201) has a plurality of instruction memory areas and a processor. Different instruction sets are selectively executable in response to a signal defining a memory area from which instructions are supplied. Preferably instruction and data memory areas are addressable as pages, wherein a page address cannot be directly accessed by a subset of instructions. The processor may include a central processing unit and a cryptographic logic unit which operate at different times and share common instruction memory and sequencing logic. Instructions are supplied to said cryptographic logic unit at an integer multiple of the rate at which they are supplied to said central processing unit.

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