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    • 1. 发明申请
    • A SYSTEM FOR AND METHOD OF INTEGRATING TEST STRUCTURES INTO AN INTEGRATED CIRCUIT
    • 将测试结构集成到集成电路中的系统和方法
    • WO2008134222A2
    • 2008-11-06
    • PCT/US2008/059967
    • 2008-04-11
    • INTERNATIONAL BUSINESS MACHINES CORPORATIONHABIB, NazmulMCMAHON, RobertPERRY, Troy
    • HABIB, NazmulMCMAHON, RobertPERRY, Troy
    • G01R31/00G06F17/50
    • G06F17/5045G01R31/31704G01R31/318364
    • A system and method (1000) for performing device-specific testing and acquiring parametric data on integrated circuits, for example ASICs, such that each chip is tested individually without excessive test time requirements, additional silicon, or special test equipment. The testing system includes a device test structure (920) integrated into unused backfill space in an IC design which tests a set of dummy devices (940) that are identical to a selected set of devices contained in the IC. The device test structures (920) are selected from a library (920) according to customer requirements and design requirements (1010). The selected test structures are further prioritized (1030) and assigned to design elements within the design in order of priority (1040). Placement algorithms (1060) use design, layout, and manufacturing requirements to place the selected test structures into the final layout of the design to be manufactured (950).
    • 一种用于在集成电路(例如ASIC)上执行设备特定测试和获取参数数据的系统和方法(1000),使得每个芯片被单独测试而没有过多的测试时间要求,附加的硅或特殊的测试设备。 测试系统包括集成在IC设计中的未使用的回填空间中的设备测试结构(920),其测试与IC中包含的所选择的一组设备相同的一组虚拟设备(940)。 设备测试结构(920)根据客户要求和设计要求从库(920)中选择(1010)。 所选择的测试结构进一步被优先化(1030),并按优先级顺序分配给设计中的设计元素(1040)。 放置算法(1060)使用设计,布局和制造要求将选定的测试结构放入要制造的设计的最终布局(950)中。