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1. 发明申请

WO2016048317A1 STRAIN ASSISTED SPIN TORQUE SWITCHING SPIN TRANSFER TORQUE MEMORY 审中-公开
标题翻译：应变辅助转子扭矩开关转子转子转子记忆
公开(公告)号：WO2016048317A1
公开(公告)日：2016-03-31
申请号：PCT/US2014/057356
申请日：2014-09-25
申请人： INTEL CORPORATION , MANIPATRUNI, Sasikanth , NIKONOV, Dmitri E. , KHAN, Asif , KIM, Raseong , GHANI, Tahir , YOUNG, Ian A.
发明人： MANIPATRUNI, Sasikanth , NIKONOV, Dmitri E. , KHAN, Asif , KIM, Raseong , GHANI, Tahir , YOUNG, Ian A.
IPC分类号： G11C11/15
CPC分类号： H01L27/228 , G11C11/161 , G11C11/1659 , G11C11/1675 , H01L27/20 , H01L41/20 , H01L43/02 , H01L43/08 , H01L43/10
摘要： Described is an apparatus which comprises: a magnetic tunneling junction (MTJ) having a free magnetic layer; a piezoelectric layer; and a conducting strain transfer layer coupled to the free magnetic layer and the piezoelectric layer. Described is a method, which comprises: exciting a piezoelectric layer with a voltage driven capacitive stimulus; and writing to a MTJ coupled to the piezoelectric layer via a strain assist layer. Described is also an apparatus which comprises: a transistor; a conductive strain transfer layer coupled to the transistor; and a MTJ device having a free magnetic layer coupled to the conductive strain transfer layer.
摘要翻译：描述了一种装置，其包括：具有自由磁性层的磁性隧道结（MTJ）; 压电层; 以及耦合到自由磁性层和压电层的导电应变传递层。描述了一种方法，其包括：用电压驱动的电容性刺激激发压电层; 并通过应变辅助层写入耦合到压电层的MTJ。还描述了一种装置，包括：晶体管; 耦合到所述晶体管的导电应变传递层; 以及具有耦合到导电应变传输层的自由磁性层的MTJ器件。

2. 发明申请

WO2016105436A1 SPIN-ORBIT LOGIC WITH CHARGE INTERCONNECTS AND MAGNETOELECTRIC NODES 审中-公开
标题翻译：具有电荷互连和磁电效应的旋转逻辑
公开(公告)号：WO2016105436A1
公开(公告)日：2016-06-30
申请号：PCT/US2014/072447
申请日：2014-12-26
申请人： INTEL CORPORATION , MANIPATRUNI, Sasikanth , NIKONOV, Dmitri E. , YOUNG, Ian A.
发明人： MANIPATRUNI, Sasikanth , NIKONOV, Dmitri E. , YOUNG, Ian A.
IPC分类号： H01L43/02
CPC分类号： H01L27/22 , H01L27/228 , H01L43/08 , H03K19/173 , H03K19/18
摘要： An apparatus including a spin to charge conversion node; and a charge to spin conversion node, wherein an input to the spin to charge conversion node produces an output at the charge to spin conversion node. An apparatus including a magnet including an input node and output node, the input node including a capacitor operable to generate magnetic response in the magnet and the output node including at least one spin to charge conversion material. A method including injecting a spin current from a first magnet; converting the spin current into a charge current operable to produce a magnetoelectric interaction with a second magnet; and changing a direction of magnetization of the second magnet in response to the magnetoelectric interaction. A method including injecting a spin current from an input node of a magnet; and converting the spin current into a charge current at an output node of the magnet.
摘要翻译：一种包括旋转电荷转换节点的装置; 以及对自旋转换节点的电荷，其中到自旋电荷转换节点的输入在电荷到自旋转换节点处产生输出。一种包括包括输入节点和输出节点的磁体的装置，所述输入节点包括可操作以在所述磁体中产生磁响应的电容器，所述输出节点包括至少一个自旋电荷转换材料。一种包括从第一磁体注入自旋电流的方法; 将自旋电流转换成可操作以产生与第二磁体的磁电相互作用的充电电流; 以及响应于所述磁电相互作用而改变所述第二磁体的磁化方向。一种包括从磁体的输入节点注入自旋电流的方法; 以及将所述自旋电流转换为所述磁体的输出节点处的充电电流。

3. 发明申请

WO2014204492A1 MTJ SPIN HALL MRAM BIT-CELL AND ARRAY 审中-公开
标题翻译： MTJ旋转磁带MRAM位电池和阵列
公开(公告)号：WO2014204492A1
公开(公告)日：2014-12-24
申请号：PCT/US2013/047153
申请日：2013-06-21
申请人： INTEL CORPORATION , MANIPATRUNI, Sasikanth , NIKONOV, Dmitri E. , YOUNG, Ian A.
发明人： MANIPATRUNI, Sasikanth , NIKONOV, Dmitri E. , YOUNG, Ian A.
IPC分类号： G11C11/15 , H01L27/115 , H01L21/8247
CPC分类号： G11C11/161 , G11C11/1655 , G11C11/1659 , G11C11/1673 , G11C11/1675 , G11C11/18 , H01L27/226 , H01L27/228 , H01L43/06 , H01L43/08 , H01L43/12
摘要： Described is an apparatus 1T-1 Magnetic Tunnel Junction (MTJ) Spin Hall Magnetic Random Access Memory (MRAM) bit-cell and array, and method of forming such. The apparatus comprises: a select line; an interconnect with Spin Hall Effect (SHE) material, the interconnect coupled to a write bit line; a transistor coupled to the select line and the interconnect, the transistor controllable by a word line; and a MTJ device having a free magnetic layer coupled to the interconnect.
摘要翻译：描述了一种装置1T-1磁隧道结（MTJ）旋转磁体随机存取存储器（MRAM）位单元和阵列及其形成方法。该装置包括：选择线; 与旋转霍尔效应（SHE）材料的互连，耦合到写位线的互连; 耦合到选择线和互连的晶体管，晶体管可由字线控制; 以及具有耦合到互连的自由磁性层的MTJ装置。

4. 发明申请

WO2018236369A1 ENHANCED MATERIALS PROCESSING FOR MAGNETO-ELECTRIC SPIN LOGIC DEVICES 审中-公开
公开(公告)号：WO2018236369A1
公开(公告)日：2018-12-27
申请号：PCT/US2017/038507
申请日：2017-06-21
申请人： INTEL CORPORATION , CHAWLA, Jasmeet S. , MANIPATRUNI, Sasikanth , LIN, Chia-Ching , NIKONOV, Dmitri E. , YOUNG, Ian A.
发明人： CHAWLA, Jasmeet S. , MANIPATRUNI, Sasikanth , LIN, Chia-Ching , NIKONOV, Dmitri E. , YOUNG, Ian A.
IPC分类号： H01L43/02 , H01L43/08 , H01L43/10
CPC分类号： H01L43/10 , H01L27/22 , H01L43/08 , H01L43/12
摘要： Embodiments are generally directed to enhanced materials processing for magneto-electric spin orbit (MESO) devices. An embodiment of an apparatus includes a first transistor and a second transistor, each transistor including a gate electrode, a first junction region, and a second junction region; a set of lines including alternating ferromagnetic material lines and non-magnetic metal interconnect lines fabricated in a wafer, the plurality of lines including metal interconnect lines to provide connections for the junction regions of the first and second transistors, including connections to provide power and control; and a MESO device including a first magnet and a second magnet, the set of lines including ferromagnetic material lines for fabrication of the MESO device magnets.

5. 发明申请

WO2018236366A1 COLOSSAL MAGNETORESISTANCE FOR MAGNETIC READ OUT 审中-公开
公开(公告)号：WO2018236366A1
公开(公告)日：2018-12-27
申请号：PCT/US2017/038472
申请日：2017-06-21
申请人： INTEL CORPORATION , MANIPATRUNI, Sasikanth , NIKONOV, Dmitri E. , YOUNG, Ian A.
发明人： MANIPATRUNI, Sasikanth , NIKONOV, Dmitri E. , YOUNG, Ian A.
IPC分类号： H01L43/08 , H01L43/02 , H01L43/10
CPC分类号： H01L43/02 , H01L43/08 , H01L43/10
摘要： Embodiments are generally directed to colossal magnetoresistance for magnetic read out utilizing Heusler alloys. An embodiment of a spin logic device includes a magnetic tunnel junction, which includes a stack including a plurality of layers, the stack including a ferromagnetic fixed layer, a ferromagnetic free layer, and a giant magnetoresistance layer between the ferromagnetic fixed layer and the first ferromagnetic free layer.

6. 发明申请

WO2018125248A1 HEUSLER ALLOY BASED MAGNETIC TUNNEL JUNCTIONS AND REFRACTORY INTERCONNECTS 审中-公开
公开(公告)号：WO2018125248A1
公开(公告)日：2018-07-05
申请号：PCT/US2016/069638
申请日：2016-12-31
申请人： INTEL CORPORATION , MANIPATRUNI, Sasikanth , CHAWLA, Jasmeet S. , WIEGAND, Christopher J. , NIKONOV, Dmitri E. , GOLONZKA, Oleg , YOUNG, Ian A.
发明人： MANIPATRUNI, Sasikanth , CHAWLA, Jasmeet S. , WIEGAND, Christopher J. , NIKONOV, Dmitri E. , GOLONZKA, Oleg , YOUNG, Ian A.
IPC分类号： H01L43/10 , H01L43/02 , H01L43/08
CPC分类号： H01L43/08 , G11C11/161 , H01F10/1936 , H01F10/3254 , H01F10/3272 , H01L27/222 , H01L43/10
摘要： Embodiments are generally directed to Heusler alloy based magnetic tunnel junctions and refractory interconnects. An embodiment of an apparatus includes a magnetic tunnel junction (MTJ) stack of an MRAM (Magnetoresistive Random Access Memory), the MTJ stack including a free magnetic layer and a fixed magnetic later, wherein the magnetic tunnel junction stack including one or more Heusler alloys; and metal interconnects for the MRAM, wherein the metal interconnects include one or more refractory metals, Silicides or Germinides of Nickel or Cobalt, refractory Heusler alloy, or Silicides of Heusler alloy.

7. 发明申请

WO2018118091A1 MAGNETO-ELECTRIC SPIN ORBIT (MESO) STRUCTURES HAVING FUNCTIONAL OXIDE VIAS 审中-公开
公开(公告)号：WO2018118091A1
公开(公告)日：2018-06-28
申请号：PCT/US2016/068584
申请日：2016-12-23
申请人： INTEL CORPORATION , CHAWLA, Jasmeet S. , MANIPATRUNI, Sasikanth , BRISTOL, Robert L. , LIN, Chia-Ching , NIKONOV, Dmitri E. , YOUNG, Ian A.
发明人： CHAWLA, Jasmeet S. , MANIPATRUNI, Sasikanth , BRISTOL, Robert L. , LIN, Chia-Ching , NIKONOV, Dmitri E. , YOUNG, Ian A.
IPC分类号： H01L43/02 , H01L43/10 , H01L43/12
摘要： Magneto-electric spin orbital (MESO) structures having functional oxide vias, and method of fabricating magneto-electric spin orbital (MESO) structures having functional oxide vias, are described. In an example, a magneto-electric spin orbital (MESO) device includes a source region and a drain region in or above a substrate. A first via contact is on the source region. A second via contact is on the drain region, the second via contact laterally adjacent to the first via contact. A plurality of alternating ferromagnetic material lines and non-ferromagnetic conductive lines is above the first and second via contacts. A first of the ferromagnetic material lines is on the first via contact, and a second of the ferromagnetic material lines is on the second via contact. A spin orbit coupling (SOC) via is on the first of the ferromagnetic material lines. A functional oxide via is on the second of the ferromagnetic material lines.

8. 发明申请

WO2017171852A1 FOUR STABLE STATE NEURON 审中-公开
标题翻译：四个稳定状态的神经元
公开(公告)号：WO2017171852A1
公开(公告)日：2017-10-05
申请号：PCT/US2016/025640
申请日：2016-04-01
申请人： INTEL CORPORATION , MANIPATRUNI, Sasikanth , YOUNG, Ian A. , NIKONOV, Dmitri E
发明人： MANIPATRUNI, Sasikanth , YOUNG, Ian A. , NIKONOV, Dmitri E
IPC分类号： G06N3/06 , G06N3/04
CPC分类号： G06N3/063 , G06N3/06 , G06N3/084 , G06N10/00
摘要： One embodiment provides a four stable state neuron. The four stable state neuron includes a plurality of input elements and a plurality of coupling channels. Each input element is coupled to a respective coupling channel and each input element is to scale a respective two-dimensional input signal by a weight. The four stable state neuron further includes a first output element coupled to the plurality of coupling channels. The first output element is to receive the plurality of weighted two-dimensional input signals and to generate a two-dimensional output signal based, at least in part, on a threshold value.
摘要翻译：一个实施例提供四个稳定的状态神经元。四个稳定状态神经元包括多个输入元件和多个耦合通道。每个输入元件耦合到相应的耦合通道，并且每个输入元件用于通过权重缩放相应的二维输入信号。四个稳定状态神经元还包括耦合到多个耦合通道的第一输出元件。第一输出元件用于接收多个加权二维输入信号并且至少部分地基于阈值来生成二维输出信号。

9. 发明申请

WO2015038118A1 CLOCKED ALL-SPIN LOGIC CIRCUIT 审中-公开
标题翻译： CLOCKED全自旋逻辑电路
公开(公告)号：WO2015038118A1
公开(公告)日：2015-03-19
申请号：PCT/US2013/059279
申请日：2013-09-11
申请人： INTEL CORPORATION , NIKONOV, Dmitri E. , MANIPATRUNI, Sasikanth , YOUNG, Ian A. , CALAYIR, Vehbi
发明人： NIKONOV, Dmitri E. , MANIPATRUNI, Sasikanth , YOUNG, Ian A. , CALAYIR, Vehbi
IPC分类号： G11C11/16 , H03K19/16 , B82Y25/00
CPC分类号： H03K19/16 , B82Y25/00 , G06F7/501 , G11C11/161 , H03K3/45 , H03K19/20
摘要： Described is a latch comprising: a first all-spin logic (ASL) device; a second ASL device coupled to the first ASL device, the second ASL device controllable by a clock signal; and a third ASL device coupled to the second ASL device, wherein the first and third ASL devices have respective magnets coupled to a power supply terminal. Described is a flip-flop which comprises: a first ASL device; a second ASL device coupled to the first ASL device, the second ASL device controllable by a first clock signal; a third ASL device coupled to the second ASL device, the third ASL device controllable by a second clock signal, the second clock signal being out of phase relative to the first clock signal; and a fourth ASL device coupled to the third ASL device, wherein the first and fourth ASL devices have respective magnets coupled to a power supply terminal.
摘要翻译：描述了一种锁存器，包括：第一全自旋逻辑（ASL）装置; 耦合到所述第一ASL设备的第二ASL设备，所述第二ASL设备可由时钟信号控制; 以及耦合到所述第二ASL装置的第三ASL装置，其中所述第一和第三ASL装置具有耦合到电源端子的相应磁体。描述了一种触发器，其包括：第一ASL装置; 耦合到所述第一ASL设备的第二ASL设备，所述第二ASL设备可由第一时钟信号控制; 耦合到所述第二ASL装置的第三ASL装置，所述第三ASL装置可由第二时钟信号控制，所述第二时钟信号相对于所述第一时钟信号异相; 以及耦合到所述第三ASL装置的第四ASL装置，其中所述第一和第四ASL装置具有耦合到电源端子的相应磁体。

10. 发明申请

WO2014142922A1 CROSS POINT ARRAY MRAM HAVING SPIN HALL MTJ DEVICES 审中-公开
标题翻译：交叉点阵列MRAM具有螺旋桨MTJ设备
公开(公告)号：WO2014142922A1
公开(公告)日：2014-09-18
申请号：PCT/US2013/031699
申请日：2013-03-14
申请人： INTEL CORPORATION , MANIPATRUNI, Sasikanth , NIKONOV, Dmitri E. , YOUNG, Ian A.
发明人： MANIPATRUNI, Sasikanth , NIKONOV, Dmitri E. , YOUNG, Ian A.
IPC分类号： G11C11/15 , H01L27/115 , H01L21/8247
CPC分类号： G11C11/1675 , G11C11/161 , G11C11/1659 , G11C11/18 , H01L27/222 , H01L43/02 , H01L43/08
摘要： Cross point array magnetoresistive random access memory (MRAM) implementing spin hall magnetic tunnel junction (MTJ)-based devices and methods of operation of such arrays are described. For example, a bit cell for a non-volatile memory includes a magnetic tunnel junction (MTJ) stack disposed above a substrate and having a free magnetic layer disposed above a dielectric layer disposed above a fixed magnetic layer. The bit cell also includes a spin hall metal electrode disposed above the free magnetic layer of the MTJ stack.
摘要翻译：描述了实现基于旋转霍尔磁隧道结（MTJ）的设备和这种阵列的操作方法的交叉点阵列磁阻随机存取存储器（MRAM）。例如，用于非易失性存储器的位单元包括设置在衬底上方的磁性隧道结（MTJ）堆叠，并且具有设置在设置在固定磁性层上方的电介质层上方的自由磁性层。位单元还包括设置在MTJ堆叠的自由磁性层上方的旋转霍尔金属电极。

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