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1. 发明申请

WO2013032512A1 MULTIVIEW VIDEO CODING SCHEMES 审中-公开
标题翻译：多视频编码方案
公开(公告)号：WO2013032512A1
公开(公告)日：2013-03-07
申请号：PCT/US2011/064615
申请日：2011-12-13
申请人： INTEL CORPORATION , LEE, Sang-Hee , ZHU, Xinglei , JIANG, Hong
发明人： LEE, Sang-Hee , ZHU, Xinglei , JIANG, Hong
IPC分类号： H04N7/26
CPC分类号： H04N19/00769 , H04N19/51 , H04N19/597 , H04N19/70
摘要： Systems, devices and methods are described including determining an inter-view coding mode for at least a portion of an image frame, specifying a corresponding value of an inter-view coding mode indicator, and providing the mode indicator in a bitstream that includes an encoded motion vector associated with the image frame portion. A first value of the mode indicator corresponds to a first inter-view coding mode where the encoded motion vector includes components in multiple dimensions. A second value of the mode indicator corresponds to a second inter-view coding mode where the encoded motion vector components include components in only one dimension.
摘要翻译：描述了系统，设备和方法，包括确定图像帧的至少一部分的视角间编码模式，指定视频间编码模式指示符的相应值，以及将模式指示符提供给包括编码的与图像帧部分相关联的运动矢量。模式指示符的第一值对应于第一视频间编码模式，其中编码的运动矢量包括多个维度的分量。模式指示符的第二值对应于第二视角间编码模式，其中编码的运动矢量分量仅包括一个维度中的分量。

2. 发明申请

WO2013048471A1 SYSTEMS, METHODS, AND COMPUTER PROGRAM PRODUCTS FOR A VIDEO ENCODING PIPELINE 审中-公开
标题翻译：视频编码管道的系统，方法和计算机程序产品
公开(公告)号：WO2013048471A1
公开(公告)日：2013-04-04
申请号：PCT/US2011/054386
申请日：2011-09-30
申请人： INTEL CORPORATION , LEE, Sang-Hee , ZHOU, Jian , LU, Ning , TANNER, Jason, D. , RHEE, Changwon, D. , JIANG, Hong
发明人： LEE, Sang-Hee , ZHOU, Jian , LU, Ning , TANNER, Jason, D. , RHEE, Changwon, D. , JIANG, Hong
IPC分类号： H04N7/26 , G06T1/00 , G06T9/00
CPC分类号： H04N19/00721 , H04N19/43 , H04N19/436 , H04N19/53 , H04N19/577 , H04N19/61
摘要： Methods, systems and computer program products that may improve the efficiency of the video encoding process. Mode decision processing and bit stream packing may be performed in parallel for various frames in a sequence. This reduces the amount of idle time for both the mode decision processing logic and the bit stream packing logic, improving the overall efficiency of the video encoder.
摘要翻译：可以提高视频编码过程效率的方法，系统和计算机程序产品。可以对序列中的各种帧并行地执行模式判定处理和比特流打包。这减少了模式决策处理逻辑和比特流打包逻辑两者的空闲时间量，从而提高了视频编码器的整体效率。

3. 发明申请

WO2010006015A2 COLOR GAMUT SCALABILITY TECHNIQUES 审中-公开
标题翻译：色彩可调性技术
公开(公告)号：WO2010006015A2
公开(公告)日：2010-01-14
申请号：PCT/US2009/049884
申请日：2009-07-08
申请人： INTEL CORPORATION , CHIU, Yi-jen , JIANG, Hong , XU, Lidong , PENG, Ya-ti
发明人： CHIU, Yi-jen , JIANG, Hong , XU, Lidong , PENG, Ya-ti
IPC分类号： H04N9/64 , H04N9/67
CPC分类号： H04N9/64 , H04N1/64 , H04N19/186 , H04N19/30 , H04N19/60
摘要： Techniques are described that can be used to either compress or expand video. Color compression techniques are described that can be used to compress the wide color gamut content into lower color gamut for inclusion in a baseline layer. Color expansion techniques are described that convert lower color gamut data into wider color gamut format for inclusion in an enhancement layer. Both of the baseline video stream and enhancement layer video streams may be transmitted through a channel or stored in a memory device to be viewed later. Accordingly, both baseline and enhancement video layers are available so that either lower or higher quality displays can be used to display video.
摘要翻译：描述了可用于压缩或扩展视频的技术。描述了可用于将宽色域内容压缩为较低色域以包含在基准层中的颜色压缩技术。描述了将较低色域数据转换为较宽色域格式以包含在增强层中的色彩扩展技术。基线视频流和增强层视频流都可以通过信道传输或存储在存储器设备中以供稍后观看。因此，基线和增强视频层都可用，以便可以使用较低或较高质量的显示器来显示视频。

4. 发明申请

WO2008083359A1 MECHANISM FOR A PARALLEL PROCESSING IN-LOOP DEBLOCK FILTER 审中-公开
标题翻译：并行处理内循环滤波器的机理
公开(公告)号：WO2008083359A1
公开(公告)日：2008-07-10
申请号：PCT/US2007/089158
申请日：2007-12-28
申请人： INTEL CORPORATION , JIANG, Hong , YANG, Yuenian
发明人： JIANG, Hong , YANG, Yuenian
IPC分类号： H04N7/24
CPC分类号： H04N19/86 , H04N19/117 , H04N19/176 , H04N19/186 , H04N19/436 , H04N19/61 , H04N19/82
摘要： In one embodiment, an apparatus and method for a parallel processing in-loop deblock filter are disclosed. In one embodiment, the method comprises: receiving a video input including a frame to be in-loop deblocked by an in-loop deblock (ILDB) filter; determining whether a macroblock (MB) of one row of the frame satisfies prerequisite conditions for the MB to be in-loop deblocked, the prerequisite conditions including an immediate left neighbor and an immediate upper-right neighbor of the MB both having completed in-loop deblocking by the ILDB filter; in-loop deblocking, by the ILDB filter, the MB if the MB satisfies the prerequisite conditions; and concurrently starting the ILDB filter on another MB in another row of the frame, the another MB having also satisfied the conditions. Other embodiments are also described.
摘要翻译：在一个实施例中，公开了一种用于并行处理循环去块滤波器的装置和方法。在一个实施例中，该方法包括：接收包括由循环内解锁（ILDB）滤波器进行环路解块的帧的视频输入; 确定帧的一行的宏块（MB）是否满足MB被循环解块的先决条件，前提条件包括MB的直接左邻居和直接右上邻居都已经完成了循环 ILDB过滤器解锁; 循环去块，由ILDB过滤器，MB如果MB满足前提条件; 并且同时在帧的另一行中的另一个MB上启动ILDB过滤器，另一个MB也满足条件。还描述了其它实施例。

5. 发明申请

WO2008082964A1 THREAD QUEUING METHOD AND APPARATUS 审中-公开
标题翻译：螺纹排队方法和装置
公开(公告)号：WO2008082964A1
公开(公告)日：2008-07-10
申请号：PCT/US2007/088008
申请日：2007-12-18
申请人： INTEL CORPORATION , JIANG, Hong , PIAZZA, Thomas A. , RAUCHFUSS, Brian D. , CHALASANI, Sreedevi , SPANGLER, Steven J.
发明人： JIANG, Hong , PIAZZA, Thomas A. , RAUCHFUSS, Brian D. , CHALASANI, Sreedevi , SPANGLER, Steven J.
IPC分类号： G06F9/46
CPC分类号： G06F9/546
摘要： In some embodiments, a method includes receiving a request to generate a thread and supplying a request to a queue in response at least to the received request. The method may further include fetching a plurality of instructions in response at least in part to the request supplied to the queue and executing at least one of the plurality of instructions. In some embodiments, an apparatus includes a storage medium having stored therein instructions that when executed by a machine result in the method. In some embodiments, an apparatus includes circuitry to receive a request to generate a thread and to queue a request to generate a thread in response at least to the received request. In some embodiments, a system includes circuitry to receive a request to generate a thread and to queue a request to generate a thread in response at least to the received request, and a memory unit to store at least one instruction for the thread.
摘要翻译：在一些实施例中，一种方法包括接收生成线程的请求并至少响应于所接收的请求向队列提供请求。该方法还可以包括至少部分地响应于提供给队列的请求并且执行多个指令中的至少一个指令来获取多个指令。在一些实施例中，装置包括存储介质，其中存储有当机器执行时产生该方法的指令。在一些实施例中，一种装置包括用于接收生成线程的请求并至少对所接收到的请求作出响应来排队请求生成线程的电路。在一些实施例中，系统包括电路，用于接收生成线程的请求，并至少响应于所接收到的请求来对请求进行排队以生成线程;以及存储器单元，用于存储线程的至少一条指令。

6. 发明申请

WO2008082940A1 USING SUPPLEMENTARY INFORMATION OF BOUNDING BOXES IN MULTI-LAYER VIDEO COMPOSITION 审中-公开
标题翻译：在多层视频组合中使用边框的补充信息
公开(公告)号：WO2008082940A1
公开(公告)日：2008-07-10
申请号：PCT/US2007/087822
申请日：2007-12-17
申请人： INTEL CORPORATION , JIANG, Hong
发明人： JIANG, Hong
IPC分类号： G06T11/40 , G06T11/00
CPC分类号： G06T11/00 , G06T15/503 , G06T2210/12 , G09G5/14 , G09G2340/12 , H04N9/8227
摘要： An apparatus for compositing graphical information with video may include a source of planes of video information and a renderer to provide a rendered graphical plane and bounding information specifying multiple disjoint areas that include non-transparent pixels within the rendered graphical plane. A controller may be connected to the renderer to control compositing of the rendered graphical plane based on the bounding information. A compositor may be connected to the source, the renderer, and the controller to composite the planes of video information and only the multiple disjoint areas within the rendered graphical plane based on control information from the controller.
摘要翻译：用于将图形信息与视频合成的装置可以包括视频信息的平面源和渲染器，以提供渲染图形平面和指定在渲染图形平面内包括非透明像素的多个不相交区域的边界信息。控制器可以连接到渲染器，以基于边界信息来控制渲染图形平面的合成。合成器可以连接到源，渲染器和控制器，以基于来自控制器的控制信息来复合视频信息的平面和仅渲染图形平面内的多个不相交的区域。

7. 发明申请

WO2006124299A2 PARALLEL EXECUTION OF MEDIA ENCODING USING MULTI-THREADED SINGLE INSTRUCTION MULTIPLE DATA PROCESSING 审中-公开
标题翻译：使用多线程单指令多媒体数据处理的媒体编码并行执行
公开(公告)号：WO2006124299A2
公开(公告)日：2006-11-23
申请号：PCT/US2006/017047
申请日：2006-05-02
申请人： INTEL CORPORATION , JIANG, Hong
发明人： JIANG, Hong
IPC分类号： H04N7/26
CPC分类号： H04N19/176 , H04N19/436 , H04N19/61
摘要： An apparatus, system, method, and article for parallel execution of media encoding using single instruction multiple data processing are described. The apparatus may include a media processing node to perform single instruction multiple data processing of macroblock data. The macroblock data may include coefficients for multiple blocks of a macroblock. The media processing node may include an encoding module to generate multiple flag words associated with multiple blocks from the macroblock data and to determine run values for multiple blocks in parallel from the flag words. Other embodiments are described and claimed.
摘要翻译：描述了使用单指令多数据处理并行执行媒体编码的装置，系统，方法和文章。该装置可以包括媒体处理节点，以对宏块数据执行单指令多重数据处理。宏块数据可以包括用于宏块的多个块的系数。媒体处理节点可以包括编码模块，用于从宏块数据生成与多个块相关联的多个标志字，并从标志字并行确定多个块的运行值。描述和要求保护其他实施例。

8. 发明申请

WO2006066188A3 HARDWARE STACK HAVING ENTRIES WITH A DATA PORTION AND ASSOCIATED COUNTER 审中-公开
公开(公告)号：WO2006066188A3
公开(公告)日：2006-06-22
申请号：PCT/US2005/045887
申请日：2005-12-13
申请人： INTEL CORPORATION , DWYER, Michael , JIANG, Hong , PIAZZA, Thomas
发明人： DWYER, Michael , JIANG, Hong , PIAZZA, Thomas
IPC分类号： G06F7/78
摘要： According to some embodiments, determining a new value to be pushed onto a hardware stack having n entries is determined. Each entry in the stack may include a data portion and an associated counter. If the new value equals the data portion of the entry associated with a current top of stack pointer, the counter associated with that entry is incremented. If the new value does not equal the data portion associated with the current top of stack pointer, the new value is stored in the data portion of the next entry and the current top of stack pointer is advanced.

9. 发明申请

WO2006044978A3 LOOPING INSTRUCTIONS FOR A SINGLE INSTRUCTION, MULTIPLE DATA EXECUTION ENGINE 审中-公开
公开(公告)号：WO2006044978A3
公开(公告)日：2006-04-27
申请号：PCT/US2005/037625
申请日：2005-10-13
申请人： INTEL CORPORATION , DWYER, Michael , JIANG, Hong
发明人： DWYER, Michael , JIANG, Hong
IPC分类号： G06F9/32 , G06F9/38
摘要： According to some embodiments, looping instructions are provided for a Single Instruction. Multiple Data (SIMD) execution engine. For example, when a first loop instruction is received at an execution engine information in an n-bit loop mask register may be copied to an n-bit wide, m-entry deep loop stack.

10. 发明申请

WO2012108934A1 SHARED VIDEO-AUDIO PIPELINE 审中-公开
标题翻译：共享视频音频流水线
公开(公告)号：WO2012108934A1
公开(公告)日：2012-08-16
申请号：PCT/US2011/066340
申请日：2011-12-21
申请人： INTEL CORPORATION , KABURLASOS, Nikos , BISWAL, Narayan , CHENG, Scott W. , JIANG, Hong , STONER, Michael D.
发明人： KABURLASOS, Nikos , BISWAL, Narayan , CHENG, Scott W. , JIANG, Hong , STONER, Michael D.
IPC分类号： G10L19/00 , G11B20/10
CPC分类号： H04N21/4143 , H04N19/42 , H04N19/44 , H04N21/42607 , H04N21/42653
摘要： Techniques are disclosed that involve the processing of audio streams. For instance, a host processing platform may receive a content stream that includes an encoded audio stream. In turn, a graphics engine produces from it a decoded audio stream. This producing may involve the graphics engine performing various operations, such as an entropy decoding operation, an inverse quantization operation, and an inverse discrete cosine transform operation. In embodiments, the content stream may further include an encoded video stream. Thus the graphics engine may produce from it a decoded video stream. This audio and video decoding may be performed in parallel.
摘要翻译：公开了涉及音频流的处理的技术。例如，主机处理平台可以接收包括编码音频流的内容流。反过来，图形引擎从其产生经解码的音频流。该产生可以涉及执行各种操作的图形引擎，诸如熵解码操作，反量化操作和反离散余弦变换操作。在实施例中，内容流还可以包括编码视频流。因此，图形引擎可以从其产生解码的视频流。该音频和视频解码可以并行执行。

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