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1. 发明申请

WO2010048093A2 GRAPHICS PROCESSING USING CULLING ON GROUPS OF VERTICES 审中-公开
标题翻译：使用垂直组合的图形处理
公开(公告)号：WO2010048093A2
公开(公告)日：2010-04-29
申请号：PCT/US2009/061183
申请日：2009-10-19
申请人： INTEL CORPORATION , HASSELGREN, Jon , MUNKBERG, Jacob , CLARBERG, Petrik , AKENINE-MÖLLER, Tomas , MIETTINEN, Ville
发明人： HASSELGREN, Jon , MUNKBERG, Jacob , CLARBERG, Petrik , AKENINE-MÖLLER, Tomas , MIETTINEN, Ville
IPC分类号： G06T1/00
CPC分类号： G06T15/40 , G06T11/40
摘要： A first representation of a group of vertices may be received and a second representation of said group of vertices may be determined based on said first representation. A first set of instructions may be executed on said second representation of the group of vertices for providing a third representation of said group of vertices. The first set of instructions is associated with vertex position determination. The third representation of the group of vertices is subjected to a culling process.
摘要翻译：可以接收一组顶点的第一表示，并且可以基于所述第一表示来确定所述顶点组的第二表示。可以在所述顶点组的所述第二表示上执行第一组指令，以提供所述顶点组的第三表示。第一组指令与顶点位置确定相关联。顶点组的第三个表示是进行剔除的过程。

2. 发明申请

WO2010029008A1 GRAPHICS-PROCESSING ARCHITECTURE BASED ON APPROXIMATE RENDERING 审中-公开
标题翻译：基于近似渲染的图形处理架构
公开(公告)号：WO2010029008A1
公开(公告)日：2010-03-18
申请号：PCT/EP2009/061391
申请日：2009-09-03
申请人： TELEFONAKTIEBOLAGET L M ERICSSON (PUBL) , RASMUSSON, Jim , AKENINE-MÖLLER, Tomas , HASSELGREN, Jon , MUNKBERG, Jacob , CLARBERG, Petrik
发明人： RASMUSSON, Jim , AKENINE-MÖLLER, Tomas , HASSELGREN, Jon , MUNKBERG, Jacob , CLARBERG, Petrik
IPC分类号： G06T15/00
CPC分类号： G06T15/005
摘要： A graphics processing circuit for rendering three-dimensional graphics data is disclosed. The circuit includes pipelined graphics processing stages, wherein each of two or more of the stages is configured to process at least one of graphics primitives, vertices, tiles, and pixels, according to a stage-specific error budget. Depending on its error budget, each of these stages may select a high- or low-precision calculation, select between lossless and lossy compression, adjust the compression ratio of a variable lossy compression algorithm, or some combination of these approaches. The circuit further comprises a global error-control unit configured to determine error budgets for each of the two or more stages, based on at least one of error data received from the two or more stages, predetermined scene complexity data, and user-defined error settings, and to assign the error budgets to the graphics processing stages. Corresponding methods for processing graphics data are also disclosed.
摘要翻译：公开了一种用于渲染三维图形数据的图形处理电路。电路包括流水线图形处理阶段，其中两个或多个阶段中的每一个被配置为根据阶段特定的错误预算来处理图形基元，顶点，瓦片和像素中的至少一个。根据其错误预算，这些阶段中的每一个可以选择高精度或低精度的计算，在无损压缩和有损压缩之间进行选择，调整可变有损压缩算法的压缩比，或这些方法的某种组合。该电路还包括全局误差控制单元，其被配置为基于从两个或多个阶段接收到的错误数据，预定场景复杂性数据和用户定义的误差中的至少一个来确定两个或更多个阶段中的每一个的错误预算设置，并将错误预算分配给图形处理阶段。还公开了处理图形数据的相应方法。

3. 发明申请

WO2009093956A1 METHOD, APPARATUS, AND COMPUTER PROGRAM PRODUCT FOR IMPROVED GRAPHICS PERFORMANCE 审中-公开
标题翻译：用于改进图形性能的方法，装置和计算机程序产品
公开(公告)号：WO2009093956A1
公开(公告)日：2009-07-30
申请号：PCT/SE2009/000022
申请日：2009-01-23
申请人： SWIFTFOOT GRAPHICS AB , HASSELGREN, Jon , MUNKBERG, Jacob , CLARBERG, Petrik , AKENINE-MÖLLER, Tomas
发明人： HASSELGREN, Jon , MUNKBERG, Jacob , CLARBERG, Petrik , AKENINE-MÖLLER, Tomas
IPC分类号： G06T15/40 , G06T15/00 , G06T15/10 , G06T15/30
CPC分类号： G06T15/405 , G06T1/60 , G06T15/005 , G06T15/40 , G06T15/80 , G06T2200/24
摘要： A method for improving performance of generation of digitally represented graphics. The method comprises: receiving a first representation of a base primitive; providing a set of instructions associated with vertex position determination; executing said retrieved set of instructions on said first representation of said base primitive using bounded arithmetic for providing a second representation of said base primitive, and subjecting said second representation of said base primitive to a culling process. A corresponding apparatus and computer program product are also presented.
摘要翻译：一种用于提高数字代表图形生成性能的方法。该方法包括：接收基本原语的第一表示; 提供与顶点位置确定相关联的一组指令; 在所述基本原语的所述第一表示上使用有界运算来执行所述检索的指令集，以提供所述基本基元的第二表示，以及对所述基本基元的所述第二表示进行剔除处理。还提出了相应的装置和计算机程序产品。

4. 发明申请

WO2009080448A1 UNIFIED COMPRESSION/DECOMPRESSION GRAPHICS ARCHITECTURE 审中-公开
标题翻译：统一的压缩/解码图形架构
公开(公告)号：WO2009080448A1
公开(公告)日：2009-07-02
申请号：PCT/EP2008/066594
申请日：2008-12-02
申请人： TELEFONAKTIEBOLAGET LM ERICSSON (PUBL) , RASMUSSON, Jim , MUNKBERG, Jacob , HASSELGREN, Jon , CLARBERG, Petrik , AKENINE-MÖLLER, Tomas
发明人： RASMUSSON, Jim , MUNKBERG, Jacob , HASSELGREN, Jon , CLARBERG, Petrik , AKENINE-MÖLLER, Tomas
IPC分类号： G06T15/00
CPC分类号： G06T11/001 , G06T1/60 , G06T9/00 , G06T15/04 , G06T2210/08
摘要： A unified compression/decompression architecture is disclosed for reducing memory bandwidth requirements in 3D graphics processing applications. The techniques described erase several distinctions between a texture (compressed once, and decompressed many times), and buffers (compressed and decompressed repeatedly during rendering of an image). An exemplary method for processing graphics data according to one or more embodiments of the invention thus begins with the updating of one or more tiles of a first image array, which are then compressed, using a real-time buffer compression algorithm, to obtain compressed image array tiles. The compressed image array tiles are stored for subsequent use as a texture. During real-time rendering of a second image array, the compressed image array tiles are retrieved and decompressed using a decompression algorithm corresponding to the buffer compression algorithm. The decompressed image array tiles are then applied as a texture to one or more primitives in the second image array.
摘要翻译：公开了一种用于减少3D图形处理应用中的存储器带宽要求的统一的压缩/解压缩架构。描述的技术擦除纹理（压缩一次，解压缩多次）和缓冲区（在渲染图像期间重复压缩和解压缩）之间的几个区别。因此，根据本发明的一个或多个实施例的用于处理图形数据的示例性方法开始于使用实时缓冲器压缩算法来更新第一图像阵列的一个或多个瓦片，然后将其压缩以获得压缩图像阵列瓦片。压缩的图像阵列瓦片被存储以供随后用作纹理。在第二图像阵列的实时渲染期间，使用对应于缓冲器压缩算法的解压缩算法来检索和解压缩压缩图像阵列瓦片。然后将解压缩的图像阵列瓦片作为纹理应用于第二图像阵列中的一个或多个基元。

5. 发明申请

WO2007084062A2 IMAGE PROCESSING 审中-公开
标题翻译：图像处理
公开(公告)号：WO2007084062A2
公开(公告)日：2007-07-26
申请号：PCT/SE2007/000053
申请日：2007-01-22
申请人： TELEFONAKTIEBOLAGET LM ERICSSON (PUBL). , AKENINE-MÖLLER, Tomas , MUNKBERG, Jacob , CLARBERG, Petrik , HASSELGREN, Jon , STRÖM, Jacob
发明人： AKENINE-MÖLLER, Tomas , MUNKBERG, Jacob , CLARBERG, Petrik , HASSELGREN, Jon , STRÖM, Jacob
IPC分类号： H04N7/26 , G06T9/00
CPC分类号： G06T9/00 , H04N19/103 , H04N19/176 , H04N19/90
摘要： First (710) and (720) second codewords are determined, based on first feature vector components of the image elements (610) in an image block (600), as representations of a first (10) and second (12) component value. Third (730) and fourth (740) codewords are determined, based on second vector components, as representations of a third (20) and fourth (22) component value. First N1 and second N2 resolution numbers are selected based on the relation of a distribution of the first vector components and a distribution of the second vector components. N1 additional component values are generated based on the first (10) and second (12) component values and N2 additional component values are generated based on the third (20) and fourth (22) component values. Component indices indicative of the generated component values (750, 760) are then provided for the different image elements (610).
摘要翻译：基于图像块（600）中的图像元素（610）的第一特征向量分量，将第一（710）和（720）第二码字确定为第一（10）和第二（12）分量值。基于第二矢量分量，第三（730）和第四（740）码字被确定为第三（20）和第四（22）分量值的表示。基于第一矢量分量的分布与第二矢量分量的分布的关系来选择第一N1和第二N2分辨率数。基于第一（10）和第二（12）分量值生成N1个附加分量值，并且基于第三（20）和第四（22）分量值生成N2个附加分量值。然后为不同的图像元素（610）提供指示所生成的分量值（750,760）的分量索引。

6. 发明申请

WO2008122536A2 FRAME BUFFER COMPRESSION AND DECOMPRESSION METHOD FOR GRAPHICS RENDERING 审中-公开
标题翻译：用于图形渲染的框架缓冲器压缩和解压缩方法
公开(公告)号：WO2008122536A2
公开(公告)日：2008-10-16
申请号：PCT/EP2008/053810
申请日：2008-03-31
申请人： TELEFONAKTIEBOLAGET LM ERICSSON (publ) , RASMUSSON, Jim , AKENINE-MÖLLER, Tomas , HASSELGREN, Jon , MUNKBERG, Jacob
发明人： RASMUSSON, Jim , AKENINE-MÖLLER, Tomas , HASSELGREN, Jon , MUNKBERG, Jacob
CPC分类号： G06T11/40 , G09G5/363 , G09G5/393 , G09G2340/02 , G09G2340/10 , H04N19/12 , H04N19/147 , H04N19/154 , H04N19/176 , H04N19/40 , H04N19/423
摘要： Methods and apparatus are disclosed for the processing of frame buffer data, such as color buffer data, in graphics processing applications. Although more generally applicable, these methods and apparatus are particularly useful in real-time, polygon-based, 3D rendering applications. An exemplary method for processing graphics data according to one or more embodiments of the invention begins with the retrieval, from a buffer, of pixel values corresponding to a tile of two or more pixels, and with the updating of one or more of those updated pixel values. The updated pixel values are selectively compressed using a lossy compression operation or a lossless compression operation, based on an accumulated error metric value for the tile. If lossy compression is used, then the accumulated error metric value for the tile is updated; in either event, the compressed pixel values are stored in the frame buffer for further processing. With this approach, the accumulated error caused by successive, or tandem, compression operations may be limited to a pre-determined maximum.
摘要翻译：公开了用于在图形处理应用中处理帧缓冲器数据（例如彩色缓冲器数据）的方法和装置。尽管更普遍适用，但是这些方法和装置在实时，基于多边形的3D渲染应用中特别有用。根据本发明的一个或多个实施例的用于处理图形数据的示例性方法开始于从缓冲器检索对应于两个或更多个像素的图块的像素值，并且随着更新这些更新像素中的一个或多个值。基于瓦片的累积误差度量值，使用有损压缩操作或无损压缩操作来选择性地压缩更新的像素值。如果使用有损压缩，则更新瓦片的累积误差量度值; 在任一情况下，将压缩像素值存储在帧缓冲器中用于进一步处理。利用这种方法，由连续或串联的压缩操作引起的累积误差可能被限制为预定的最大值。

7. 发明申请

WO2007064280A1 COMPUTER GRAPHICS PROCESSOR AND METHOD FOR RENDERING A THREE-DIMENSIONAL IMAGE ON A DISPLAY SCREEN 审中-公开
标题翻译：用于在显示屏幕上渲染三维图像的计算机图形处理器和方法
公开(公告)号：WO2007064280A1
公开(公告)日：2007-06-07
申请号：PCT/SE2006/001365
申请日：2006-11-29
申请人： AKENINE-MÖLLER, Tomas , HASSELGREN, Jon , MUNKBERG, Jacob
发明人： AKENINE-MÖLLER, Tomas , HASSELGREN, Jon , MUNKBERG, Jacob
IPC分类号： G06T15/00
CPC分类号： G06T15/005 , G06T11/40 , G06T15/205
摘要： A computer graphics processor (20,50) and a method for rendering a three-dimensional image on a display screen. The computer graphics processor (20,50) comprises a rasterizer (23,53) configured to perform pixel traversal of a primitive after projection of the primitive. Furthermore, the rasterizer (23,53) is configured to perform the pixel traversal of a first primitive for a plurality of views prior to performing pixel traversal of a next primitive for one or several views.
摘要翻译：一种计算机图形处理器（20,50）和用于在显示屏幕上呈现三维图像的方法。计算机图形处理器（20,50）包括光栅化器（23,53），其被配置为在投影基元之后执行图元的像素遍历。此外，光栅化器（23,53）被配置为在对一个或多个视图执行下一个图元的像素遍历之前对多个视图执行第一基元的像素遍历。

8. 发明申请

WO2008091198A1 METHOD, DISPLAY ADAPTER AND COMPUTER PROGRAM PRODUCT FOR IMPROVED GRAPHICS PERFORMANCE BY USING A REPLACEABLE CULLING PROGRAM 审中-公开
标题翻译：方法，显示适配器和计算机程序产品，用于通过使用可更换的程序来改进图形性能
公开(公告)号：WO2008091198A1
公开(公告)日：2008-07-31
申请号：PCT/SE2008/000055
申请日：2008-01-23
申请人： SWIFTFOOT GRAPHICS AB , AKENINE-MÖLLER, Tomas , HASSELGREN, Jon
发明人： AKENINE-MÖLLER, Tomas , HASSELGREN, Jon
IPC分类号： G06T15/40
CPC分类号： G06T15/005 , G06T15/40 , G06T15/405
摘要： It is presented a method for improving performance of generation of digitally represented graphics. Said method comprises the steps of: selecting (440) a tile comprising fragments to process; executing (452) a culling program for the tile, the culling program being replaceable; and executing a set of instructions, selected from a plurality of sets of instructions based on an output value of the culling program, for each of a plurality of subsets of the fragments. A corresponding display adapter and computer program product are also presented.
摘要翻译：提出了一种提高数字代表图形生成性能的方法。所述方法包括以下步骤：选择（440）包括要处理的片段的片; 执行（452）所述瓦片的淘汰程序，所述拣选程序是可替换的; 以及对于片段的多个子集中的每一个，执行从多个指令集中选择的一组指令，所述指令集合基于所述剔除程序的输出值。还提供了相应的显示适配器和计算机程序产品。

9. 发明申请

WO2011078858A1 IMAGE PROCESSING TECHNIQUES 审中-公开
标题翻译：图像处理技术
公开(公告)号：WO2011078858A1
公开(公告)日：2011-06-30
申请号：PCT/US2009/069353
申请日：2009-12-23
申请人： INTEL CORPORATION , AKENINE-MOLLER, Tomas , TOTH, Robert , HASSELGREN, Jon , MUNKBERG, Carol , CLARBERG, Franz
发明人： AKENINE-MOLLER, Tomas , TOTH, Robert , HASSELGREN, Jon , MUNKBERG, Carol , CLARBERG, Franz
IPC分类号： G06T3/00 , G06T1/00
CPC分类号： G06T1/20 , G06T11/40 , G06T15/005 , G06T2210/12
摘要： Techniques are described that can delay or even prevent use of memory to store triangles associated with tiles as well as processing resources associated with vertex shading and binning triangles. The techniques can also provide better load balancing among a set of cores, and hence provide better performance. A bounding volume is generated to represent a geometry group. Culling takes place to determine whether a geometry group is to have triangles rendered. Vertex shading and association of triangles with tiles can be performed across multiple cores in parallel. Processing resources are allocated for rasterizing tiles that have been vertex shaded and binned triangles over tiles that have yet to be vertex shaded and binned triangles. Rasterization of triangles of different tiles can be performed by multiple cores in parallel.
摘要翻译：描述了可以延迟甚至阻止使用存储器来存储与瓦片相关联的三角形以及处理与顶点着色和合并三角形相关联的资源的技术。这些技术还可以在一组核心之间提供更好的负载平衡，从而提供更好的性能。生成一个边界体来表示一个几何组。进行剔除以确定几何组是否具有呈现的三角形。顶点阴影和三角形与瓦片的关联可以并行执行多个核心。分配处理资源用于光栅化已经是顶点着色的瓦片，以及尚未成为顶点着色和二进制三角形的瓦片的二进制三角形。不同瓦片三角形的光栅化可以由多个并行的核心执行。

10. 发明申请

WO2018052525A1 PRIMING HIERARCHICAL DEPTH LOGIC WITHIN A GRAPHICS PROCESSOR 审中-公开
标题翻译：在图形处理器内启动分级深度逻辑
公开(公告)号：WO2018052525A1
公开(公告)日：2018-03-22
申请号：PCT/US2017/042857
申请日：2017-07-19
申请人： INTEL CORPORATION
发明人： ANDERSSON, Magnus , HASSELGREN, Jon , AKENINE-MOLLER, Tomas
IPC分类号： G06T15/40 , G06T7/50 , G06T1/20 , G06T1/60
摘要： Embodiments described herein enable a hierarchical-Z unit of a graphics processor to be primed using Hi-Z data generated by occlusion culling operations performed on a general purpose processor. One embodiment provides for instructions to cause operations including performing occlusion culling for a scene via the general purpose processor and storing generated hierarchical-Z data. The Hierarchical-Z data generated during the occlusion culling operations can be shared with the graphics processor and used to prime a hierarchical-Z unit of the graphics processor. The at least a portion of the scene can then be rendered using the hierarchical-Z data after priming the hierarchical-Z unit, improving the effectiveness of hierarchical-Z operations of the graphics processor for the scene.
摘要翻译：这里描述的实施例使得能够使用在通用处理器上执行的遮挡剔除操作所生成的Hi-Z数据来启动图形处理器的分层Z单元。一个实施例提供了用于引起操作的指令，包括经由通用处理器对场景执行遮挡剔除并存储所生成的分层Z数据。在遮挡剔除操作期间生成的Hierarchical-Z数据可以与图形处理器共享并且用于初始化图形处理器的分层Z单元。然后可以在启动分层Z单元之后使用分层Z数据渲染场景的至少一部分，提高图形处理器对场景的分层Z操作的有效性。

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