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1. 发明申请

WO2014204703A1 SUBSET BASED COMPRESSION AND DECOMPRESSION OF GRAPHICS DATA 审中-公开
标题翻译：基于SUBSET的压缩和图形数据解码
公开(公告)号：WO2014204703A1
公开(公告)日：2014-12-24
申请号：PCT/US2014/041622
申请日：2014-06-10
申请人： INTEL CORPORATION , SURTI, Prasoonkumar , AKENINE-MOLLER, Tomas G. , HASSELGREN, Jon N. , MUNKBERG, Carl J. , NILSSON, Jim K.
发明人： SURTI, Prasoonkumar , AKENINE-MOLLER, Tomas G. , HASSELGREN, Jon N. , MUNKBERG, Carl J. , NILSSON, Jim K.
IPC分类号： G06T1/00 , G06T9/00
CPC分类号： G06T1/60 , G06T9/005 , G06T11/40
摘要： Techniques related to graphics rendering including techniques for compression and/or decompression of graphics data by use of indexed subsets are described.
摘要翻译：描述与图形渲染相关的技术，包括通过使用索引子集来压缩和/或解压缩图形数据的技术。

2. 发明申请

WO2014204692A1 COMPRESSION AND DECOMPRESSION OF GRAPHICS DATA USING PIXEL REGION BIT VALUES 审中-公开
标题翻译：使用像素区域位值的图形数据的压缩和解码
公开(公告)号：WO2014204692A1
公开(公告)日：2014-12-24
申请号：PCT/US2014/041481
申请日：2014-06-09
申请人： INTEL CORPORATION , AKENINE-MOLLER, Tomas G. , NILSSON, Jim K. , SURTI, Prasoonkumar , HASSELGREN, Jon N. , MUNKBERG, Carl J.
发明人： AKENINE-MOLLER, Tomas G. , NILSSON, Jim K. , SURTI, Prasoonkumar , HASSELGREN, Jon N. , MUNKBERG, Carl J.
IPC分类号： G06T9/00 , G06T1/00
CPC分类号： G06T1/60 , G06K9/4652 , G06K2009/4666 , G06T7/90 , G06T9/00 , G06T11/00 , G06T2200/28 , G06T2207/20021
摘要： Techniques related to graphics rendering including techniques for compression and/or decompression of graphics data by use of pixel region bit values are described.
摘要翻译：描述了与图形渲染相关的技术，包括通过使用像素区域位值来压缩和/或解压缩图形数据的技术。

3. 发明申请

WO2014182469A1 IMPROVED MULTI-SAMPLING ANTI-ALIASING COMPRESSION BY USE OF UNREACHABLE BIT COMBINATIONS 审中-公开
标题翻译：通过使用不可逾越的组合方式改进多重采样反向压缩
公开(公告)号：WO2014182469A1
公开(公告)日：2014-11-13
申请号：PCT/US2014/035453
申请日：2014-04-25
申请人： INTEL CORPORATION , AKENINE-MOLLER, Tomas, G. , SURTI, Prasoonkumar , MUNKBERG, Carl, J.
发明人： AKENINE-MOLLER, Tomas, G. , SURTI, Prasoonkumar , MUNKBERG, Carl, J.
IPC分类号： G06T1/00 , G06T5/00
CPC分类号： G09G3/2003 , G06T11/20 , G06T11/40 , G06T2200/12
摘要： Techniques related to graphics rendering including techniques for improved multi -sampling anti-aliasing compression by use of unreachable bit combinations are described. A computer-implemented method for providing anti-aliasing in graphics rendering comprising determining bit combinations for individual pixels of a tile of pixels and transforming at least one bit combination of the bit combinations to an unreachable bit combination.
摘要翻译：描述与图形渲染相关的技术，包括通过使用不可达位组合来改进多采样抗混叠压缩的技术。一种用于在图形渲染中提供抗锯齿的计算机实现的方法，包括确定像素块的各个像素的比特组合，并将比特组合的至少一个比特组合变换为不可达比特组合。

4. 发明申请

WO2014189730A1 LOSSY COLOR MERGE FOR MULTI-SAMPLING ANTI-ALIASING COMPRESSION 审中-公开
标题翻译：用于多采样抗锯齿压缩的丢失颜色合成
公开(公告)号：WO2014189730A1
公开(公告)日：2014-11-27
申请号：PCT/US2014/037953
申请日：2014-05-14
申请人： INTEL CORPORATION , AKENINE-MOLLER, Tomas G. , PIAZZA, Thomas A. , SURTI, Prasoonkumar
发明人： AKENINE-MOLLER, Tomas G. , PIAZZA, Thomas A. , SURTI, Prasoonkumar
IPC分类号： G06T1/00 , H04N9/64
CPC分类号： G06T5/002 , G06T9/00 , G06T11/40 , G06T15/503
摘要： Techniques related to graphic rendering including lossy color merge for multi-sampling anti-aliasing compression are discussed. A method for providing anti-aliasing in graphic rendering comprising determining two or more colors associated with a plurality of color samples of a pixel; determining a first color of the two or more colors and a second color of the two or more colors are substantially similar; merging the first color and the second color to form a merged color; and replacing the first color and the second color with the merged color.
摘要翻译：讨论了与图形渲染相关的技术，包括用于多采样抗锯齿压缩的有损颜色合并。一种用于在图形渲染中提供抗锯齿的方法，包括确定与像素的多个颜色样本相关联的两个或多个颜色; 确定两种或更多种颜色的第一颜色和两种或更多种颜色的第二颜色基本相似; 合并第一种颜色和第二种颜色以形成合并的颜色; 并用合并的颜色替换第一颜色和第二颜色。

5. 发明申请

WO2012096789A1 FILTERING MECHANISM FOR RENDER TARGET LINE MODIFICATION 审中-公开
标题翻译：用于变色目标线修改的滤波机制
公开(公告)号：WO2012096789A1
公开(公告)日：2012-07-19
申请号：PCT/US2011/067954
申请日：2011-12-29
申请人： INTEL CORPORATION , SURTI, Prasoonkumar
发明人： SURTI, Prasoonkumar
IPC分类号： G06F9/06 , G06F9/30
CPC分类号： G06F12/0895 , G06F2212/401 , G06F2212/455 , G06T1/60 , G06T2200/28 , G09G5/36 , G09G5/363 , G09G2340/02 , G09G2360/121 , G09G2360/122
摘要： Modification messages may be filtered to reduce the load on a message channel between a render cache and a frame buffer compression. A group of cache lines may be checked to see whether both a subspan request hits an unlit bit and a modify message was already sent. If so, the modification message may be filtered.
摘要翻译：可以对修改消息进行过滤，以减少渲染缓存和帧缓冲区压缩之间的消息通道的负载。可以检查一组高速缓存行，以查看子跨越请求是否触发不亮位，并且已经发送修改消息。如果是这样，可以对修改消息进行过滤。

6. 发明申请

WO2020190432A1 MULTI-TILE GRAPHICS PROCESSOR RENDERING 审中-公开
公开(公告)号：WO2020190432A1
公开(公告)日：2020-09-24
申请号：PCT/US2020/017996
申请日：2020-02-12
申请人： INTEL CORPORATION , SURTI, Prasoonkumar , HUNTER, Arthur , SINHA, Kamal , JANUS, Scott , INSKO, Brent , RANGANATHAN, Vasanth , STRIRAMASSARMA, Lakshminarayanan
发明人： SURTI, Prasoonkumar , HUNTER, Arthur , SINHA, Kamal , JANUS, Scott , INSKO, Brent , RANGANATHAN, Vasanth , STRIRAMASSARMA, Lakshminarayanan
IPC分类号： G06T15/00
摘要： Embodiments are generally directed to multi-tile graphics processor rendering. An embodiment of an apparatus includes a memory for storage of data; and one or more processors including a graphics processing unit (GPU) to process data, wherein the GPU includes a plurality of GPU tiles, wherein, upon geometric data being assigned to each of a plurality of screen tiles, the apparatus is to transfer the geometric data to the plurality of GPU tiles.

7. 发明申请

WO2015199941A1 EFFICIENT HARDWARE MECHANISM TO ENSURE SHARED RESOURCE DATA COHERENCY ACROSS DRAW CALLS 审中-公开
标题翻译：有效的硬件机制，以确保共享资源数据的相似性
公开(公告)号：WO2015199941A1
公开(公告)日：2015-12-30
申请号：PCT/US2015/034263
申请日：2015-06-04
申请人： INTEL CORPORATION , SURTI, Prasoonkumar , NAVALE, Aditya , BOLES, Jeffery S.
发明人： SURTI, Prasoonkumar , NAVALE, Aditya , BOLES, Jeffery S.
IPC分类号： G06T1/20
CPC分类号： G06T1/20 , G06T15/005 , G09G5/363 , G09G2360/08
摘要： Systems and methods may provide for receiving a plurality of signals from a software module associated with a shared resource such as, for example, an unordered access view (UAV). The plurality of signals may include a first signal that indicates whether a draw call accesses the shared resource, a second signal that indicates whether a boundary of the draw call has been reached, and a third signal that indicates whether the draw call has a coherency requirement. Additionally, a workload corresponding to the draw call may be selectively dispatched in a shader invocation based on the plurality of signals.
摘要翻译：系统和方法可以提供从与例如无序访问视图（UAV）等共享资源相关联的软件模块接收多个信号。多个信号可以包括指示绘图呼叫是否访问共享资源的第一信号，指示绘制呼叫的边界是否已经到达的第二信号，以及指示绘制呼叫是否具有一致性要求的第三信号。此外，可以基于多个信号在着色器调用中选择性地调度与绘图调用相对应的工作量。

8. 发明申请

WO2020190429A1 DATA PREFETCHING FOR GRAPHICS DATA PROCESSING 审中-公开
公开(公告)号：WO2020190429A1
公开(公告)日：2020-09-24
申请号：PCT/US2020/017897
申请日：2020-02-12
申请人： INTEL CORPORATION , VEMULAPALLI, Vikranth , STRIRAMASSARMA, Lakshminarayanan , MACPHERSON, Mike , ANANTARAMAN, Aravindh , ASHBAUGH, Ben , RAMADOSS, Murali , SADLER, William B. , PEARCE, Jonathan , JANUS, Scott , INSKO, Brent , RANGANATHAN, Vasanth , SINHA, Kamal , HUNTER, Arthur , SURTI, Prasoonkumar , GALOPPO VON BORRIES, Nicolas , RAY, Joydeep , APPU, Abhisek R. , OULD-AHMED-VALL, ElMoustapha , KOKER, Altug , KIM, Sungye , MAIYURAN, Subramaniam , ANDREI, Valentin
发明人： VEMULAPALLI, Vikranth , STRIRAMASSARMA, Lakshminarayanan , MACPHERSON, Mike , ANANTARAMAN, Aravindh , ASHBAUGH, Ben , RAMADOSS, Murali , SADLER, William B. , PEARCE, Jonathan , JANUS, Scott , INSKO, Brent , RANGANATHAN, Vasanth , SINHA, Kamal , HUNTER, Arthur , SURTI, Prasoonkumar , GALOPPO VON BORRIES, Nicolas , RAY, Joydeep , APPU, Abhisek R. , OULD-AHMED-VALL, ElMoustapha , KOKER, Altug , KIM, Sungye , MAIYURAN, Subramaniam , ANDREI, Valentin
IPC分类号： G06F12/0862 , G06F12/0897 , G06F12/0888 , G06F9/38
摘要： Embodiments are generally directed to data prefetching for graphics data processing. An embodiment of an apparatus includes one or more processors including one or more graphics processing units (GPUs); and a plurality of caches to provide storage for the one or more GPUs, the plurality of caches including at least an L1 cache and an L3 cache, wherein the apparatus to provide intelligent prefetching of data by a prefetcher of a first GPU of the one or more GPUs including measuring a hit rate for the L1 cache; upon determining that the hit rate for the L1 cache is equal to or greater than a threshold value, limiting a prefetch of data to storage in the L3 cache, and upon determining that the hit rate for the L1 cache is less than a threshold value, allowing the prefetch of data to the L1 cache.

9. 发明申请

WO2014105609A1 TECHNIQUES FOR IMPROVING MSAA RENDERING EFFICIENCY 审中-公开
标题翻译：改进MSAA渲染效率的技术
公开(公告)号：WO2014105609A1
公开(公告)日：2014-07-03
申请号：PCT/US2013/076430
申请日：2013-12-19
申请人： INTEL CORPORATION , SURTI, Prasoonkumar , PIAZZA, Thomas A.
发明人： SURTI, Prasoonkumar , PIAZZA, Thomas A.
IPC分类号： G06T15/00 , G06T1/20
CPC分类号： G06T15/503 , G06T11/40 , G06T15/005 , G06T2200/12 , G06T2210/08
摘要： Various embodiments are generally directed to techniques for causing the storage of a color data value of a clear color to be deferred as rendered color data values are stored for samples. A device comprises a processor circuit and a storage to store instructions that cause the processor circuit to render a pixel from multiple samples taken of a three-dimensional model of an object, the pixel corresponding to a pixel sample data which comprises multiple color storage locations that are each identified by a numeric identifier, and which comprises multiple sample color indices that each correspond to a sample to point to at least one color storage location; and allocate color storage locations in an order selected to define a subset of possible combinations of binary index values among all of the sample color indices as invalid combinations. Other embodiments are described and claimed.
摘要翻译：各种实施例通常涉及用于在为样本存储所渲染的颜色数据值时使得清除颜色的颜色数据值的存储被延迟的技术。一种设备包括处理器电路和存储器，用于存储使得处理器电路从取自对象的三维模型的多个样本渲染像素的指令，该像素对应于包括多个颜色存储位置的像素样本数据，每个都由数字标识符标识，并且其包括多个样本颜色索引，每个样本颜色索引对应于样本以指向至少一个颜色存储位置; 并且以所选择的顺序分配颜色存储位置，以将所有样本颜色索引中的二进制索引值的可能组合的子集定义为无效组合。描述和要求保护其他实施例。

10. 发明申请

WO2020190806A1 GRAPHICS PROCESSOR DATA ACCESS AND SHARING 审中-公开
公开(公告)号：WO2020190806A1
公开(公告)日：2020-09-24
申请号：PCT/US2020/022844
申请日：2020-03-14
申请人： INTEL CORPORATION
发明人： KOKER, Altug , GEORGE, Varghese , ANANTARAMAN, Aravindh , ANDREI, Valentin , APPU, Abhishek R. , COORAY, Niran , GALOPPO VON BORRIES, Nicolas , MACPHERSON, Mike , MAIYURAN, Subramaniam , OULD-AHMED-VALL, ElMoustapha , PUFFER, David , RANGANATHAN, Vasanth , RAY, Joydeep , SHAH, Ankur N. , STRIRAMASSARMA, Lakshminarayanan , SURTI, Prasoonkumar , TANGRI, Saurabh
IPC分类号： G06F9/38 , G06F12/0862 , G06F9/30
摘要： Embodiments are generally directed to graphics processor data access and sharing. An embodiment of an apparatus includes a circuit element to produce a result in processing of an application; a load-store unit to receive the result and generate pre-fetch information for a cache utilizing the result; and a prefetch generator to produce prefetch addresses based at least in part on the pre-fetch information; wherein the load-store unit is to receive software assistance for prefetching, and wherein generation of the pre-fetch information is based at least in part on the software assistance.

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