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    • 2. 发明申请
    • APPARATUS, SYSTEM, AND METHOD FOR TIMING RECOVERY
    • 用于定时恢复的装置,系统和方法
    • WO2012125253A2
    • 2012-09-20
    • PCT/US2012/025313
    • 2012-02-15
    • INTEL CORPORATIONJIANG, YuemingMOHANEVELU, RavindranALTMANN, Michael W.
    • JIANG, YuemingMOHANEVELU, RavindranALTMANN, Michael W.
    • G06F1/04G06F13/14G06F13/38
    • H04L7/0087H04L7/0025H04L7/0332
    • Described herein are an apparatus, system and method for timing recovery in processors by means of a simplified receiver architecture that consumes less power consumption, has lower bit error rate (BER), and higher jitter tolerance. The apparatus comprises a phase interpolator to generate a clock signal; a first integrator to integrate a first portion of a data signal over a duration of a phase of the clock signal; a first sampler to sample the first integrated portion by means of the clock signal; a first circuit to store a first edge sample of the data signal; a second sampler to sample the stored first edge sample by means of the clock signal; and a clock data recovery unit to update the phase interpolator based at least on the sampled first integrated portion and sampled stored first edge sample of the data signal.
    • 这里描述了一种用于通过简化的接收机架构在处理器中进行定时恢复的装置,系统和方法,该架构消耗较少的功耗,具有较低的误码率(BER)和较高的抖动容限。 该装置包括一个相位内插器以产生一个时钟信号; 第一积分器,用于在时钟信号的相位的持续时间内对数据信号的第一部分进行积分; 第一采样器,通过时钟信号采样第一集成部分; 第一电路,用于存储数据信号的第一边缘采样; 第二采样器,通过时钟信号对所存储的第一边缘采样进行采样; 以及时钟数据恢复单元,用于至少基于数据信号的采样的第一积分部分和采样的存储的第一边缘采样来更新相位内插器。