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1. 发明申请

WO2006039187A3 SIGMA-DELTA BASED PHASE LOCK LOOP 审中-公开
标题翻译：基于SIGMA-DELTA的相位锁定环
公开(公告)号：WO2006039187A3
公开(公告)日：2007-01-18
申请号：PCT/US2005034018
申请日：2005-09-21
申请人： GCT SEMICONDUCTOR INC , KOO YIDO , AHN YOUNGHO , SONG EUNSEOK , LEE JEONG-WOO , PARK JOONBAE , LEE KYEONGHO
发明人： KOO YIDO , AHN YOUNGHO , SONG EUNSEOK , LEE JEONG-WOO , PARK JOONBAE , LEE KYEONGHO
IPC分类号： H03D3/24
CPC分类号： H03L7/0895 , H03L7/1976
摘要： A sigma-delta based phase lock loop device is provided that includes a phase frequency detector (PFD), a charge pump and a voltage controlled oscillator. The PDF to receive a reference signal and a feedback signal and to output signals based on a comparison of the reference signal and the feedback signal. The charge pump to output a charge based on the output signals from the PFD. The charge pump including a first current source to apply a fixed amount of current and a second current source to apply a variable amount of current. The voltage controlled oscillator to output a clock signal based on the received charge from the charge pump.
摘要翻译：提供了一种基于Σ-Δ的锁相环装置，其包括相位频率检测器（PFD），电荷泵和压控振荡器。 PDF接收参考信号和反馈信号，并且基于参考信号和反馈信号的比较来输出信号。电荷泵根据PFD的输出信号输出电荷。电荷泵包括施加固定电流量的第一电流源和第二电流源以施加可变量的电流。压控振荡器根据来自电荷泵的接收电荷输出时钟信号。

2. 发明申请

WO2004040898A3 SYSTEM AND METHOD FOR SUPPRESSING NOISE IN A PHASE-LOCKED LOOP CIRCUIT 审中-公开
标题翻译：用于抑制锁相环电路中的噪声的系统和方法
公开(公告)号：WO2004040898A3
公开(公告)日：2004-09-02
申请号：PCT/US0333709
申请日：2003-10-23
申请人： GCT SEMICONDUCTOR INC , AHN YOUNGHO , SONG EUNSEOK , KOO YIDO , LEE JEONG-WOO , PARK JOONBAE , LEE KYEONGHO
发明人： AHN YOUNGHO , SONG EUNSEOK , KOO YIDO , LEE JEONG-WOO , PARK JOONBAE , LEE KYEONGHO
IPC分类号： H03L7/197 , H03L7/06
CPC分类号： H03L7/1978
摘要： A system and method for improving the signal-to-noise ratio of a frequency generator suppresses phase noise and noise generated from mismatches in the internal generator circuits. This is accomplished using a modulation scheme which shifts spurious noise signals outside the loop bandwidth of the generator. When shifted in this manner, the noise signals may be removed entirely or to any desired degree using, for example, a filter located along the signal path of the generator. In one embodiment, a Sigma-Delta modulator controls the value of a pulse-swallow frequency divider situated along a feedback path of a phase-locked loop to achieve a desired level of noise suppression. In another embodiment, a reference signal input into a phase-locked loop is modulated to effect noise suppression. In another embodiment, the foregoing forms of modulation are combined to accomplish the desired frequency shift. Through these modulation techniques, the signal-to-noise ratio of the frequency generator may be substantially improved while simultaneously achieving faster lock times.
摘要翻译：用于改善频率发生器的信噪比的系统和方法抑制了由于内部发生器电路中的失配而产生的相位噪声和噪声。这是利用调制方案实现的，该调制方案将发生器的环路带宽之外的寄生噪声信号移位。当以这种方式移动时，噪声信号可以使用例如沿着发生器的信号路径定位的滤波器被完全移除或以任何期望的程度移除。在一个实施例中，Σ-Δ调制器控制沿着锁相环路的反馈路径设置的脉冲吞咽分频器的值，以实现期望的噪声抑制水平。在另一个实施例中，输入到锁相环中的参考信号被调制以实现噪声抑制。在另一个实施例中，上述形式的调制被组合以实现期望的频移。通过这些调制技术，频率发生器的信噪比可以显着提高，同时实现更快的锁定时间。

3. 发明申请

WO2004040822A3 RADIO RECEIVER AND METHOD FOR AM SUPPRESSION AND DC-OFFSET REMOVAL 审中-公开
标题翻译：无线电接收机和消除抑制和直流偏移的方法
公开(公告)号：WO2004040822A3
公开(公告)日：2004-07-08
申请号：PCT/US0333708
申请日：2003-10-23
申请人： GCT SEMICONDUCTOR INC , PARK JOONBAE , LEE KYEONGHO , SONG EUNSEOK , JUNG YEONJAE
发明人： PARK JOONBAE , LEE KYEONGHO , SONG EUNSEOK , JUNG YEONJAE
IPC分类号： H04B1/10 , H04L25/10
CPC分类号： H04B1/109
摘要： A communications receiver includes a baseband signal recovery circuit (4) which uses a low-IF architecture for data reception. The baseband signal recovery circuit uses a full-analog implementation for channel selection and filtering (5). Thus, the overhead placed on the design of analog-to-digital converter is greatly relaxed and most of hardware can be re-used for multi-mode applications with only a slight modification.
摘要翻译：通信接收机包括使用低IF架构进行数据接收的基带信号恢复电路（4）。基带信号恢复电路使用全模拟实现进行信道选择和滤波（5）。因此，放置在模数转换器设计上的开销大大放松，大多数硬件可以重新用于多模式应用，只需稍作修改。

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