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1. 发明申请

WO2022266419A1 TUNABLE DISTRIBUTED OSCILLATOR 审中-公开
公开(公告)号：WO2022266419A1
公开(公告)日：2022-12-22
申请号：PCT/US2022/033951
申请日：2022-06-17
申请人： AZARMNIA, Morteza , DUSATKO, Tomas , AHMAD, Fazil , GARAMPAZZI, Marco
发明人： AZARMNIA, Morteza , DUSATKO, Tomas , AHMAD, Fazil , GARAMPAZZI, Marco
IPC分类号： G06F1/04 , H03B5/18 , H03L7/04
摘要： An integrated circuit transceiver device includes a plurality of functional circuits, and clock circuitry for distributing synchronous, in-phase, phase-locked clock signals to all transceiver circuits. The clock circuitry includes a frequency-controllable distributed oscillator including at least one coupled pair of transmission line oscillators having a respective oscillator core, and at least one respective transmission line segment. At least one impedance element couples the at least one respective transmission line segment of a first transmission line oscillator to the at least one respective transmission line segment of a second transmission line oscillator. Impedance of the impedance element is different from impedance of each respective transmission line segment to cause reflection at the at least one impedance element. At least one tap corresponding to each respective one of the transmission line oscillators outputs synchronous, in-phase, phase-locked clock signals for the functional circuits at points along the distributed oscillator.

2. 发明申请

WO2008146301A3 SUCCESSIVE APPROXIMATION ANAGLOG-TO-DIGITAL CONVERTER WITH INBUILT REDUNDANCY 审中-公开
公开(公告)号：WO2008146301A3
公开(公告)日：2008-12-04
申请号：PCT/IN2008/000158
申请日：2008-03-17
申请人： ANALOG DEVICES, INC. , AHMAD, Fazil
发明人： AHMAD, Fazil
IPC分类号： H03M1/38
摘要： The method and system for converting an analog value into a digital equivalent using a plurality of conversion engines are disclosed. In one embodiment the plurality of conversion engines comprise N DACs associated with M comparators, wherein M is substantially greater than N, wherein M and N are integers, wherein each of the N CAP DACs has an associated P CAP DAC and an N CAP DAC, a method includes generating voltage differences between P CAP DACs and N CAP DACs such that they produce M threshold voltages. The plurality of conversion engines operate in a first phase of the conversion by inputting the produced M threshold voltages to associated inputs of M comparators so that more than one bit can be determined from a sampled signal during each successive approximation trial. The plurality of conversion engines operate in a second phase of the conversion by inputting the produced M threshold voltages into the associated inputs of the M comparators such that the plurality of conversion engines operate independently so that fewer bits are determined from the sampled signal during each successive approximation trial than were determined during the first phase. A result obtained from at least one of the plurality of conversion engines is then outputted.

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