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2. 发明申请

WO2006044190A2 METHOD AND SYSTEM FOR MANAGING ADDRESS BITS DURING BUFFERED PROGRAM OPERATIONS IN A MEMORY DEVICE 审中-公开
标题翻译：在存储器件中缓存程序运行期间管理地址位的方法和系统
公开(公告)号：WO2006044190A2
公开(公告)日：2006-04-27
申请号：PCT/US2005/035658
申请日：2005-10-04
申请人： ATMEL CORPORATION , BARTOLI, Simone , SURICO, Stefano , MANFRE, Davide , FERRARIO, Donato
发明人： BARTOLI, Simone , SURICO, Stefano , MANFRE, Davide , FERRARIO, Donato
IPC分类号： G06F12/10
CPC分类号： G06F12/04 , G11C16/10 , G11C2216/14
摘要： A method and system for managing a buffered program operation for plurality of words is described. In one aspect, the method and system include providing an internal buffer including a plurality of locations and at least one bit location for the plurality of locations. Each of the words is stored in a location of the plurality of locations. The words are associated with internal address bits for the locations. At least one of the internal address bits is at least one group address bit that corresponds to all of the words. A remaining portion of the internal address bits is associated at least one of the words. The at least one bit location stores the at least one group address bit for the words. Thus, in one aspect, the method and system include storing each of the words one of the buffer locations. The method and system also include associating the at least one group address bit with the buffer location for each of the words.
摘要翻译：描述用于管理用于多个单词的缓冲程序操作的方法和系统。一方面，该方法和系统包括提供包括多个位置的多个位置和至少一个位置的内部缓冲器。每个词都存储在多个位置的位置。这些单词与位置的内部地址位相关联。至少一个内部地址位是与所有字对应的至少一个组地址位。内部地址位的剩余部分与至少一个字相关联。所述至少一个位位置存储所述字的至少一个组地址位。因此，在一个方面，该方法和系统包括存储缓冲器位置之一中的每一个字。该方法和系统还包括将至少一个组地址位与每个字的缓冲器位置相关联。

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