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    • 3. 发明申请
    • WEAVE SEQUENCE COUNTER FOR NON-VOLATILE MEMORY SYSTEMS
    • 用于非易失性存储器系统的WEAVE序列计数器
    • WO2013040537A1
    • 2013-03-21
    • PCT/US2012/055698
    • 2012-09-17
    • APPLE INC.POST, Daniel, J.WAKRAT, Nir, JacobKHMELNITSKY, Vadim
    • POST, Daniel, J.WAKRAT, Nir, JacobKHMELNITSKY, Vadim
    • G06F9/26
    • G06F12/0246G06F2212/7202G06F2212/7207G06F2212/7211
    • Systems and methods are disclosed for providing a weave sequence counter ("WSC") for non-volatile memory ("NVM") systems. The WSC can identify the sequence in which each page of the NVM is programmed. The "weave" aspect can refer to the fact that multiple blocks can be open for programming at once, thus allowing the pages of these blocks to be programmed in a "woven" manner. Systems and methods are also disclosed for providing a host weave sequence counter ("HWSC"). Each time new data is initially programmed to the NVM, this data can be associated with a particular HWSC. The HWSC associated with the data may not change, even when the data is moved to a new page (e.g., for wear leveling purposes and the like). The WSC and HWSC may aid in, for example, performing rollback, building logical -to-physical mappings, determining static-versus-dynamic page statuses, and performing maintenance operations (e.g., wear leveling).
    • 公开了用于为非易失性存储器(“NVM”)系统提供编织序列计数器(“WSC”)的系统和方法。 WSC可以识别NVM的每个页面被编程的顺序。 “编织”方面可以指多个块可以一次打开以进行编程,从而允许以“编织”的方式对这些块的页面进行编程。 还公开了用于提供主机编织序列计数器(“HWSC”)的系统和方法。 每当新数据最初被编程到NVM时,该数据可以与特定的HWSC相关联。 即使将数据移动到新页面(例如,用于磨损均衡目的等),与数据相关联的HWSC也可能不会改变。 WSC和HWSC可以帮助例如执行回滚,构建逻辑到物理映射,确定静态到动态页面状态以及执行维护操作(例如,磨损均衡)。
    • 5. 发明申请
    • BOOTING A MEMORY DEVICE FROM A HOST
    • 从主机处理记忆设备
    • WO2013006568A3
    • 2014-05-08
    • PCT/US2012045288
    • 2012-07-02
    • APPLE INCFAI ANTHONYWAKRAT NIR JACOBSEROFF NICHOLAS
    • FAI ANTHONYWAKRAT NIR JACOBSEROFF NICHOLAS
    • G06F9/00
    • G06F3/0604G06F3/0632G06F3/0655G06F3/0679G06F9/4416G06F12/0246
    • In one implementation, a method includes receiving, at a memory device, an instruction to boot the memory device, wherein the memory device includes non-volatile memory accessible by a controller of the memory device; and, in response to receiving the instruction to boot the memory device, obtaining, by the memory device, firmware from a host device, wherein the host device is separate from and communicatively coupled to the memory device. The method can also include booting the memory device using the firmware from the host device, wherein the memory device boots separately from the host device, and the host device performs operations using data or instructions stored in the non-volatile memory and obtained through communication with the memory controller of the memory device.
    • 在一个实现中,一种方法包括在存储器设备处接收引导存储器设备的指令,其中存储器设备包括由存储器设备的控制器可访问的非易失性存储器; 并且响应于接收到引导所述存储器设备的指令,由所述存储器设备从主机设备获得固件,其中所述主机设备与所述存储设备分离并且通信地耦合到所述存储设备。 该方法还可以包括使用来自主机设备的固件引导存储设备,其中存储器设备与主机设备分开启动,并且主机设备使用存储在非易失性存储器中的数据或指令来执行操作,并通过与 存储器设备的存储器控​​制器。
    • 6. 发明申请
    • BOOTING A MEMORY DEVICE FROM A HOST
    • 从主机处理记忆设备
    • WO2013006568A2
    • 2013-01-10
    • PCT/US2012/045288
    • 2012-07-02
    • APPLE INC.FAI, AnthonyWAKRAT, Nir, JacobSEROFF, Nicholas
    • FAI, AnthonyWAKRAT, Nir, JacobSEROFF, Nicholas
    • G06F12/02G06F15/177
    • G06F3/0604G06F3/0632G06F3/0655G06F3/0679G06F9/4416G06F12/0246
    • In one implementation, a method includes receiving, at a memory device, an instruction to boot the memory device, wherein the memory device includes non-volatile memory accessible by a controller of the memory device; and, in response to receiving the instruction to boot the memory device, obtaining, by the memory device, firmware from a host device, wherein the host device is separate from and communicatively coupled to the memory device. The method can also include booting the memory device using the firmware from the host device, wherein the memory device boots separately from the host device, and the host device performs operations using data or instructions stored in the non-volatile memory and obtained through communication with the memory controller of the memory device.
    • 在一个实现中,一种方法包括在存储器设备处接收引导存储器设备的指令,其中存储器设备包括由存储器设备的控制器可访问的非易失性存储器; 并且响应于接收到引导所述存储器设备的指令,由所述存储器设备从主机设备获得固件,其中所述主机设备与所述存储设备分离并且通信地耦合到所述存储设备。 该方法还可以包括使用来自主机设备的固件引导存储设备,其中存储器设备与主机设备分开启动,并且主机设备使用存储在非易失性存储器中的数据或指令来执行操作,并通过与 存储器设备的存储器控​​制器。
    • 8. 发明申请
    • LOW LATENCY READ OPERATION FOR MANAGED NON-VOLATILE MEMORY
    • 管理非易失性存储器的低延迟读操作
    • WO2010129305A1
    • 2010-11-11
    • PCT/US2010/032627
    • 2010-04-27
    • APPLE INC.POST, Daniel JeffreyWAKRAT, Nir JacobKHMELNITSKY, Vadim
    • POST, Daniel JeffreyWAKRAT, Nir JacobKHMELNITSKY, Vadim
    • G06F11/07G06F11/10
    • G06F11/1068
    • In a memory system, a host controller is coupled to a non-volatile memory (NVM) package (e.g., NAND device). The host controller sends a read command to the NVM package requesting a low latency read operation. Responsive to the read command, a controller in the NVM package retrieves the data and sends the data to an ECC engine for correcting. Following the read command, the host controller sends a read status request command to the controller in the NVM package. Responsive to the read status request, the controller sends a status report to the host controller indicating that some or all of the data is available for transfer to the host controller. Responsive to the report, the host controller transfers the data. An underrun status can be determined to indicate that uncorrected data had been transferred to the host controller.
    • 在存储器系统中,主机控制器耦合到非易失性存储器(NVM)封装(例如,NAND器件)。 主机控制器向NVM包发送读取命令,请求低延迟读取操作。 响应于读取命令,NVM包中的控制器检索数据并将数据发送到ECC引擎进行校正。 在读取命令之后,主机控制器向NVM包中的控制器发送读状态请求命令。 响应于读取状态请求,控制器向主机控制器发送状态报告,指示部分或全部数据可用于传送到主机控制器。 响应报告,主机控制器传输数据。 可以确定欠运行状态以指示未校正的数据已被传送到主机控制器。