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1. 发明申请

WO2008109388A1 CLOCK EDGE MANAGEMENT IN NOISE SENSITIVE SYSTEMS 审中-公开
标题翻译：噪声敏感系统中的时钟边缘管理
公开(公告)号：WO2008109388A1
公开(公告)日：2008-09-12
申请号：PCT/US2008/055408
申请日：2008-02-29
申请人： LUMINARY MICRO, INC. , NORTH, Gregory
发明人： NORTH, Gregory
IPC分类号： G06F1/04
CPC分类号： H03L7/00
摘要： This disclosure describes a method to use a clock edge management system (800) in semiconductor devices for noise sensitive systems that includes digital circuits (828) and analog circuits (820). The system (800) includes the following: a high frequency clock source (802), an analog clock processing circuit (804) to produce an analog clock signal (814) used by analog circuits (820), a digital clock processing circuit (806) to produce a digital clock signal (822) used by digital circuits (828). The system (800) combines the outputs of a first comparator (808) and a second comparator (810) with a Boolean logic gate (812) to produce an analog clock window signal Wns. The system (800) then produces delay into the digital clock signal so that it is delayed beyond the noise sensitive region of the analog circuits.
摘要翻译：本公开描述了一种在包括数字电路（828）和模拟电路（820）的噪声敏感系统的半导体器件中使用时钟边缘管理系统（800）的方法。系统（800）包括：高频时钟源（802），用于产生由模拟电路（820）使用的模拟时钟信号（814）的模拟时钟处理电路（804），数字时钟处理电路（806））以产生由数字电路（828）使用的数字时钟信号（822）。系统（800）将第一比较器（808）和第二比较器（810）的输出与布尔逻辑门（812）组合以产生模拟时钟窗口信号Wns。然后，系统（800）产生延迟到数字时钟信号，使其延迟超出模拟电路的噪声敏感区域。

2. 发明申请

WO2008076727B1 PLATFORM PROGRAMMING FOR MASS CUSTOMIZATION 审中-公开
标题翻译：用于大规模定制的平台编程
公开(公告)号：WO2008076727B1
公开(公告)日：2008-08-21
申请号：PCT/US2007087133
申请日：2007-12-12
申请人： LUMINARY MICRO INC , MCMAHON SCOTT , KIRCHER BRIAN , NORTH GREGORY
发明人： MCMAHON SCOTT , KIRCHER BRIAN , NORTH GREGORY
IPC分类号： G06F17/50
CPC分类号： G06F17/5045
摘要： This disclosure describes a configuration data structure (100) that describes the functional characteristics of a single semiconductor device during the mass customization of semiconductor devices. The configuration data structure (100) includes a device identification member (110), a peripheral enable member (111), an alternate function select member (112), a port bonding specification member (113), and a resource specification member (114). In addition, this disclosure describes a system (300) that specifies and controls the functional characteristics of a single semiconductor device during the mass customization of semiconductor devices. The system (300) includes the following one or more internal peripheral buses (201), one or more peripherals (320-326), a functional I/O mux (302), a configuration data structure (100), and a GPIO (212).
摘要翻译：本公开描述了在半导体器件的大规模定制期间描述单个半导体器件的功能特性的配置数据结构（100）。配置数据结构（100）包括设备识别构件（110），外围使能构件（111），备用功能选择构件（112），端口绑定指定构件（113）和资源指定构件（114）。此外，本公开描述了在半导体器件的大规模定制期间指定和控制单个半导体器件的功能特性的系统（300）。系统（300）包括以下一个或多个内部外围总线（201），一个或多个外围设备（320-326），功能I / O复用器（302），配置数据结构（100）和GPIO（ 212）。

3. 发明申请

WO2008076727A1 PLATFORM PROGRAMMING FOR MASS CUSTOMIZATION 审中-公开
标题翻译：用于大规模定制的平台编程
公开(公告)号：WO2008076727A1
公开(公告)日：2008-06-26
申请号：PCT/US2007/087133
申请日：2007-12-12
申请人： LUMINARY MICRO, INC. , MCMAHON, Scott , KIRCHER, Brian , NORTH, Gregory
发明人： MCMAHON, Scott , KIRCHER, Brian , NORTH, Gregory
IPC分类号： G06F17/50
CPC分类号： G06F17/5045
摘要： This disclosure describes a configuration data structure 100 that describes the functional characteristics of a single semiconductor device during the mass customization of semiconductor devices. The configuration data structure 100 includes a device identification member 110, a peripheral enable member 111, an alternate function select member 112, a port bonding specification member 113, and a resource specification member 114. In addition, this disclosure describes a system 300 that specifies and controls the functional characteristics of a single semiconductor device during the mass customization of semiconductor devices. The system 300 includes the following one or more internal peripheral buses 201, one or more peripherals 320-326, a functional I/O mux 302, a configuration data structure 100, and a GPIO 212.
摘要翻译：本公开描述了在半导体器件的大规模定制期间描述单个半导体器件的功能特性的配置数据结构100。配置数据结构100包括设备识别构件110，外围使能构件111，备用功能选择构件112，端口绑定规范构件113和资源指定构件114.另外，本公开描述了指定并且在半导体器件的大规模定制期间控制单个半导体器件的功能特性。系统300包括以下一个或多个内部外围总线201，一个或多个外围设备320-326，功能I / O复用器302，配置数据结构100和GPIO 212。

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