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    • 2. 发明申请
    • GENERATION OF PARITY-CHECK MATRICES
    • WO2009004601A9
    • 2009-01-08
    • PCT/IE2008/000071
    • 2008-07-01
    • TECHNOLOGY FROM IDEAS LIMITEDMCEVOY, PaulWENUS, JakubHURLEY, Ted
    • MCEVOY, PaulWENUS, JakubHURLEY, Ted
    • G06F11/10H03M13/11
    • Circuits perform row-by-row matrix generation for encoding and decoding of data blocks. They perform fast algebraic generation of high performance low density parity check (LDPC) matrices suitable for use in a wide range of error correction coding and decoding (ECC) applications. Circuit operation is based on a mathematical Cyclic Ring method that enables matrices of any size to be generated from a simple set of initial parameters, based on user-defined performance requirements. The main steps for generating a parity check matrix (H) are selection of an RG matrix structure, selection of Group Ring elements, generating the sub matrices for the RG matrix by a row filling scheme, generating the RG matrix by a cyclic arrangement of the sub matrices, and generating the parity-check matrix by deleting suitably chosen columns from the RG matrix to achieve the desired performance and then transposing the matrix. A circuit performs data encoding or decoding by receiving initial vectors calculated from row vectors of a previously-generated parity check matrix H, cyclic shifting the vectors to generate a desired output row of the parity check matrix H, re¬ arranging the operation order of the vectors depending on the RG matrix structure and the chosen row, operating on the vectors on information to be encoded.
    • 3. 发明申请
    • GENERATION OF PARITY-CHECK MATRICES
    • 生成奇偶校验矩阵
    • WO2009004601A2
    • 2009-01-08
    • PCT/IE2008000071
    • 2008-07-01
    • TECHNOLOGY FROM IDEAS LTDMCEVOY PAULWENUS JAKUBHURLEY TED
    • MCEVOY PAULWENUS JAKUBHURLEY TED
    • H03M13/116H03M13/033H03M13/1102H03M13/6527
    • Circuits perform row-by-row matrix generation for encoding and decoding of data blocks. They perform fast algebraic generation of high performance low density parity check (LDPC) matrices suitable for use in a wide range of error correction coding and decoding (ECC) applications. Circuit operation is based on a mathematical Cyclic Ring method that enables matrices of any size to be generated from a simple set of initial parameters, based on user-defined performance requirements. The main steps for generating a parity check matrix (H) are selection of an RG matrix structure, selection of Group Ring elements, generating the sub matrices for the RG matrix by a row filling scheme, generating the RG matrix by a cyclic arrangement of the sub matrices, and generating the parity-check matrix by deleting suitably chosen columns from the RG matrix to achieve the desired performance and then transposing the matrix. A circuit performs data encoding or decoding by receiving initial vectors calculated from row vectors of a previously-generated parity check matrix H, cyclic shifting the vectors to generate a desired output row of the parity check matrix H, re¬ arranging the operation order of the vectors depending on the RG matrix structure and the chosen row, operating on the vectors on information to be encoded.
    • 电路为数据块的编码和解码执行逐行矩阵生成。 它们执行适用于各种纠错编码和解码(ECC)应用的高性能低密度奇偶校验(LDPC)矩阵的快速代数生成。 电路操作基于数学循环环方法,该方法可根据用户定义的性能要求从一组简单的初始参数生成任意大小的矩阵。 生成奇偶校验矩阵(H)的主要步骤是选择RG矩阵结构,选择组环元素,通过行填充方案生成RG矩阵的子矩阵,通过循环排列 子矩阵,并且通过从RG矩阵中删除适当选择的列来生成奇偶校验矩阵以实现期望的性能,然后转置该矩阵。 电路通过接收从先前生成的奇偶校验矩阵H的行向量计算的初始向量,循环移位向量以生成奇偶校验矩阵H的期望的输出行,重新排列该奇偶校验矩阵的操作次序来执行数据编码或解码 取决于RG矩阵结构和所选行的矢量,对待编码信息上的矢量进行操作。
    • 4. 发明申请
    • MOORING COMPONENTS
    • 系泊组件
    • WO2011033114A2
    • 2011-03-24
    • PCT/EP2010/063823
    • 2010-09-20
    • TECHNOLOGY FROM IDEAS LIMITEDMCEVOY, Paul
    • MCEVOY, Paul
    • B63B21/00B63B21/20
    • B63B21/00B63B2021/203D07B1/22D07B2401/2005D07B2501/2061Y10T29/49764
    • The present invention relates to a mooring component (2) for use in mooring systems. The component (2) comprises a plurality of deformable elements (6a,6b) having a reversible non-linear stress-strain response. The six elements (6a,6b) are formed from elastomeric materials and have different lengths and/or cross-sectional areas and/or are formed from different materials. The overall response of the component (2) is a composite reversible non-linear stress-strain response that is a combination of the responses of each of the plurality of elements (6a,6b). The stress-strain response of the component (2) may be tailored to the expected environmental loading for the location at which the mooring system is to be used.
    • 本发明涉及一种用于系泊系统的系泊组件(2)。 部件(2)包括具有可逆的非线性应力 - 应变响应的多个可变形元件(6a,6b)。 六个元件(6a,6b)由弹性体材料形成并且具有不同的长度和/或横截面积和/或由不同的材料形成。 组件(2)的总体响应是复合可逆非线性应力 - 应变响应,其是多个元件(6a,6b)中的每一个的响应的组合。 组件(2)的应力 - 应变响应可以适应系泊系统将被使用的位置的预期环境负载。
    • 6. 发明申请
    • MOORING COMPONENTS
    • 运动组件
    • WO2011033114A3
    • 2011-09-29
    • PCT/EP2010063823
    • 2010-09-20
    • TECHNOLOGY FROM IDEAS LTDMCEVOY PAUL
    • MCEVOY PAUL
    • B63B21/00B63B21/20
    • B63B21/00B63B2021/203D07B1/22D07B2401/2005D07B2501/2061Y10T29/49764
    • The present invention relates to a mooring component (2) for use in mooring systems. The component (2) comprises a plurality of deformable elements (6a,6b) having a reversible non-linear stress-strain response. The six elements (6a,6b) are formed from elastomeric materials and have different lengths and/or cross-sectional areas and/or are formed from different materials. The overall response of the component (2) is a composite reversible non-linear stress-strain response that is a combination of the responses of each of the plurality of elements (6a,6b). The stress-strain response of the component (2) may be tailored to the expected environmental loading for the location at which the mooring system is to be used.
    • 本发明涉及一种用于系泊系统的系泊部件(2)。 组件(2)包括具有可逆非线性应力应变响应的多个可变形元件(6a,6b)。 六个元件(6a,6b)由弹性体材料形成并且具有不同的长度和/或横截面面积和/或由不同的材料形成。 组件(2)的总体响应是作为多个元件(6a,6b)中的每一个的响应的组合的复合可逆非线性应力 - 应变响应。 组件(2)的应力 - 应变响应可以针对要使用系泊系统的位置的预期环境负荷进行调整。
    • 9. 发明申请
    • GENERATION OF PARITY-CHECK MATRICES
    • 奇偶校验矩阵的产生
    • WO2009004601A3
    • 2009-06-25
    • PCT/IE2008000071
    • 2008-07-01
    • TECHNOLOGY FROM IDEAS LTDMCEVOY PAULWENUS JAKUBHURLEY TED
    • MCEVOY PAULWENUS JAKUBHURLEY TED
    • G06F11/10H03M13/11
    • H03M13/116H03M13/033H03M13/1102H03M13/6527
    • Circuits perform row-by-row matrix generation for encoding and decoding of data blocks. They perform fast algebraic generation of high performance low density parity check (LDPC) matrices suitable for use in a wide range of error correction coding and decoding (ECC) applications. Circuit operation is based on a mathematical Cyclic Ring method that enables matrices of any size to be generated from a simple set of initial parameters, based on user-defined performance requirements. The main steps for generating a parity check matrix (H) are selection of an RG matrix structure, selection of Group Ring elements, generating the sub matrices for the RG matrix by a row filling scheme, generating the RG matrix by a cyclic arrangement of the sub matrices, and generating the parity-check matrix by deleting suitably chosen columns from the RG matrix to achieve the desired performance and then transposing the matrix. A circuit performs data encoding or decoding by receiving initial vectors calculated from row vectors of a previously-generated parity check matrix H, cyclic shifting the vectors to generate a desired output row of the parity check matrix H, re¬ arranging the operation order of the vectors depending on the RG matrix structure and the chosen row, operating on the vectors on information to be encoded.
    • 电路执行逐行矩阵生成,用于对数据块进行编码和解码。 它们执行快速代数生成适用于宽范围纠错编码和解码(ECC)应用的高性能低密度奇偶校验(LDPC)矩阵。 电路操作基于一种数学循环环法,可以根据用户定义的性能要求,从一组简单的初始参数生成任意大小的矩阵。 用于生成奇偶校验矩阵(H)的主要步骤是选择RG矩阵结构,选择组环元素,通过行填充方案生成RG矩阵的子矩阵,通过循环布置生成RG矩阵 子矩阵,并且通过从RG矩阵中删除适当选择的列来产生奇偶校验矩阵,以实现期望的性能,然后转置矩阵。 电路通过接收从先前生成的奇偶校验矩阵H的行向量计算的初始向量来执行数据编码或解码,循环移位向量以生成奇偶校验矩阵H的期望输出行,重新布置 取决于RG矩阵结构和所选行的向量,对要编码的信息的向量进行操作。