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    • 1. 发明申请
    • SIGNAL PROCESSOR
    • 信号处理器
    • WO1989012359A1
    • 1989-12-14
    • PCT/JP1989000579
    • 1989-06-07
    • FUJITSU LIMITEDKAKUISHI, MitsuoUESHIMA, Tsuyoshi
    • FUJITSU LIMITED
    • H03H17/02
    • H03M1/20H03M1/1235
    • Use is made of two A/D conversion systems of low accuracy to obtain digital output signals maintaining higher conversion accuracy than that of only one A/D conversion. By using two D/A conversion systems of low accuracy, furthermore, analog output signals are obtained maintaining higher conversion accuracy than that of only one D/A conversion system. Provision is further made of digital signal clock conversion means for forming second digital data in synchronism with second clocks by the interpolation processing based on the data obtained by highly sampling first digital data series and a difference between the first clock timing and the second clock timing. Using two PCM.CODEC's (54, 55) and one DSP which are cheap and small in size, A/D and D/A conversions are realized maintaining high accuracy. Therefore, the signal processing that was so far carried out using a large-scale analog circuit is now carried out easily using one DSP. In this case, furthermore, the digital signal clock conversion means is realized in the same DSP as the digital signal processing.