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1. 发明申请

WO1998025307A1 SEMICONDUCTOR DEVICE 审中-公开
标题翻译：半导体器件
公开(公告)号：WO1998025307A1
公开(公告)日：1998-06-11
申请号：PCT/JP1997004344
申请日：1997-11-27
申请人： SHARP KABUSHIKI KAISHA , IWATA, Hiroshi , KAKIMOTO, Seizou , NAKANO, Masayuki , MATSUOKA, Toshimasa
发明人： SHARP KABUSHIKI KAISHA
IPC分类号： H01L27/08
CPC分类号： H01L29/1087 , H01L27/092 , H01L29/7832
摘要： A semiconductor device which materializes dynamic threshold operation, on the assumption of the application of a bulk semiconductor substrate. The semiconductor substrate has a first conductivity type well region (11), a source region (12) and a drain region (13) of second conductivity type are made in the vicinity of the surface of the first conductivity type of well region (11), a channel region (14) is provided between these regions (12 and 13), a gate insulating film (15) and a gate electrode (16) are stacked in order on the channel region (14), and the gate electrode (16) is connected to the well region (11) through the contact hole (not shown in the figure) of the gate insulating film (15). In this transistor, as compared with a conventional SOI substrate, the resistance of the well region (11) can be lowered to about one-tenth.
摘要翻译：在假设应用体半导体衬底的情况下实现动态阈值操作的半导体器件。半导体衬底具有第一导电类型阱区（11），在第一导电类型的阱区（11）的表面附近形成第二导电类型的源区（12）和漏区（13）在这些区域（12,13）之间设置沟道区域（14），栅极绝缘膜（15）和栅极电极（16）依次层叠在沟道区域（14）上，栅电极（16））通过栅极绝缘膜（15）的接触孔（图中未示出）连接到阱区（11）。在该晶体管中，与传统的SOI衬底相比，阱区（11）的电阻可以降低到约十分之一。

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