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1. 发明申请

WO2013004825A1 A METHOD FOR CONTROLLING TRANSACTION EXCHANGES BETWEEN TWO INTEGRATED CIRCUITS 审中-公开
标题翻译：一种用于控制两个集成电路之间的交换交换的方法
公开(公告)号：WO2013004825A1
公开(公告)日：2013-01-10
申请号：PCT/EP2012/063295
申请日：2012-07-06
申请人： ST-ERICSSON SA , BALAKRISHNAN, Bipin , GOULAHSEN, Abdelaziz
发明人： BALAKRISHNAN, Bipin , GOULAHSEN, Abdelaziz
IPC分类号： G06F1/32
CPC分类号： G06F13/362 , G06F1/26 , G06F1/3203 , G06F1/3253 , Y02D10/151
摘要： A method for controlling transaction exchanges between two integrated circuits (12, 14) in a system (10) comprising: - the two integrated circuits (12, 14), - a power supply for powering a link between the two integrated circuits, thereby enabling transaction exchanges between both integrated circuits (12, 14), - a controller (40) controlling the integrated circuits (12, 14) and the power supply, the method comprising the steps of: a) receiving an order at the controller (40) to lower an amount of power supplied by the power supply to the link, b) sending an instruction from the controller (40) to both integrated circuits (12, 14) to prevent the integrated circuits (21, 14) from initiating new transactions, c) lowering the power supplied to the link once any pending transactions have been executed. The method enables to reliably close the link.
摘要翻译：一种用于控制系统（10）中的两个集成电路（12,14）之间的交易交换的方法，包括： - 所述两个集成电路（12,14）， - 为所述两个集成电路之间的链路供电的电源，从而使能两个集成电路（12,14）之间的交易交换， - 控制集成电路（12,14）和电源的控制器（40），该方法包括以下步骤：a）在控制器（40）接收订单，降低由所述电源向所述链路提供的功率量; b）从所述控制器（40）向两个集成电路（12,14）发送指令，以防止所述集成电路（21,14）发起新的交易， c）一旦执行任何待处理的交易，降低提供给链接的电力。该方法能够可靠地关闭链路。

2. 发明申请

WO2012038546A1 MULTI-LANE DATA TRANSMISSION DE-SKEW 审中-公开
标题翻译：多路数据传输DE-SKEW
公开(公告)号：WO2012038546A1
公开(公告)日：2012-03-29
申请号：PCT/EP2011/066622
申请日：2011-09-23
申请人： ST-ERICSSON SA , BALAKRISHNAN, Bipin , GOULAHSEN, Abdelaziz
发明人： BALAKRISHNAN, Bipin , GOULAHSEN, Abdelaziz
IPC分类号： H04L7/00 , H04L25/14 , H04L7/033
CPC分类号： H04L25/4908 , H04L25/05
摘要： There is described a de-skew circuit and a method of de-skewing a multi lane serial interface. De-skew can be done by delaying one of the recovered symbol clocks from a lane and using this delayed symbol clock to sample the data received from all the lanes. Thus, it is possible to mandate that the maximum possible skew is less than a symbol clock period for short interconnect lengths and also through stricter routing guidelines. The circuit and the method ensure low power and low latency de-skew of a multi-lane data transmission link.
摘要翻译：描述了一种去偏斜电路和一种使多通道串行接口去偏转的方法。可以通过将来自车道的恢复的符号时钟中的一个延迟并使用该延迟的符号时钟来对从所有车道接收的数据进行采样来完成去偏移。因此，有可能要求最大可能的偏移小于短互连长度的符号时钟周期，并且还要通过更严格的路由指导。电路和方法确保多通道数据传输链路的低功率和低延迟去偏移。

3. 发明申请

WO2010031824A1 DEVICE FOR EXCHANGING DATA BETWEEN COMPONENTS OF AN INTEGRATED CIRCUIT 审中-公开
标题翻译：用于在集成电路的组件之间交换数据的设备
公开(公告)号：WO2010031824A1
公开(公告)日：2010-03-25
申请号：PCT/EP2009/062077
申请日：2009-09-17
申请人： STMICROELECTRONICS (GRENOBLE) SAS , GOULAHSEN, Abdelaziz
发明人： GOULAHSEN, Abdelaziz
IPC分类号： G06F13/42 , H04J11/00
CPC分类号： H04J11/00
摘要： A method for transmitting messages from first units of an integrated circuit to at least one second unit of the integrated circuit. The first units generate first digital messages and transform them into second digital messages obtained by application of an orthogonal or quasi-orthogonal transformation to the first messages. The second messages of the first units are added up and transmitted to the second unit.
摘要翻译：一种用于将消息从集成电路的第一单元发送到集成电路的至少一个第二单元的方法。第一单元产生第一数字消息并将它们转换成通过将正交或准正交变换应用于第一消息而获得的第二数字消息。第一单元的第二个消息被相加并传送到第二个单元。

4. 发明申请

WO2013034646A3 REGULATING THE ACTIVITY OF A CORE 审中-公开
公开(公告)号：WO2013034646A3
公开(公告)日：2013-03-14
申请号：PCT/EP2012/067425
申请日：2012-09-06
申请人： ST-ERICSSON SA , RIES, Gilles , GOULAHSEN, Abdelaziz
发明人： RIES, Gilles , GOULAHSEN, Abdelaziz
IPC分类号： G06F1/32 , G06F1/20
摘要： It is proposed a method for regulating the activity of a core running at a given clock rate. The method comprises: monitoring (S100) a value of a parameter of the core, the parameter being a critical parameter for a safe operating of the core; determining whether the monitored value reaches a trigger value; when the monitored value reaches the trigger value (S120): modifying the clock rate of the core (S130) by decreasing the ratio of active cycles of the clock; and running the core at the clock rate modified (S140) by decreasing the ratio of active cycles of the clock; when the monitored value reaches a second time the trigger value (S170): modifying the clock rate of the core (S180) by increasing the ratio of active cycles of the clock; and running the core at the clock rate(S190) modified by increasing the ratio of active cycles of the clock.

5. 发明申请

WO2013034646A2 REGULATING THE ACTIVITY OF A CORE 审中-公开
标题翻译：调节核心的活动
公开(公告)号：WO2013034646A2
公开(公告)日：2013-03-14
申请号：PCT/EP2012067425
申请日：2012-09-06
申请人： ST ERICSSON SA , RIES GILLES , GOULAHSEN ABDELAZIZ
发明人： RIES GILLES , GOULAHSEN ABDELAZIZ
IPC分类号： G06F1/32
CPC分类号： G06F1/3206 , G06F1/206 , G06F1/324 , G06F1/3296 , G06F11/00 , Y02D10/126
摘要： It is proposed a method for regulating the activity of a core running at a given clock rate. The method comprises: monitoring (S100) a value of a parameter of the core, the parameter being a critical parameter for a safe operating of the core; determining whether the monitored value reaches a trigger value; when the monitored value reaches the trigger value (S120): modifying the clock rate of the core (S130) by decreasing the ratio of active cycles of the clock; and running the core at the clock rate modified (S140) by decreasing the ratio of active cycles of the clock; when the monitored value reaches a second time the trigger value (S170): modifying the clock rate of the core (S180) by increasing the ratio of active cycles of the clock; and running the core at the clock rate(S190) modified by increasing the ratio of active cycles of the clock.
摘要翻译：提出了一种用于调节以给定时钟速率运行的核的活动的方法。该方法包括：监视（S100）核心参数的值，该参数是核心安全运行的关键参数; 确定所监视的值是否达到触发值; 当监视值达到触发值时（S120）：通过减小时钟的有效周期的比例来修改内核的时钟速率（S130）; 并通过降低时钟的有效周期的比例，以修改的时钟速率（S140）运行核心; 当所述监视值到达所述触发值的第二时间时（S170）：通过增加所述时钟的有效周期的比率来修改所述核心的时钟速率（S180）; 并通过增加时钟的有效周期比例，以时钟速率（S190）运行核心。

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