专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明申请

WO2010096646A3 GRAPHENE PROCESSING FOR DEVICE AND SENSOR APPLICATIONS 审中-公开
标题翻译：用于设备和传感器应用的石墨加工
公开(公告)号：WO2010096646A3
公开(公告)日：2010-11-04
申请号：PCT/US2010024723
申请日：2010-02-19
申请人： UNIV FLORIDA , APPLETON BILL R , GILA BRENT P
发明人： APPLETON BILL R , GILA BRENT P
IPC分类号： H01L21/265
CPC分类号： H01L29/78684 , H01L21/26506 , H01L29/16 , H01L29/1606 , H01L29/7781 , H01L29/78603 , Y10T428/24802
摘要： A supported graphene device comprises at least one graphene feature of 1 to about 10 graphene layers having a predetermined shape and pattern, with at least a portion of each graphene feature being supported on a substrate. In some embodiments the device comprises graphene features supported on crystalline semiconductor substrate, such as silicon or germanium. The graphene features on a crystalline semiconductor substrate can be fabricated by forming an amorphous carbon doped semiconductor on the crystalline semiconductor substrate and then epitaxially crystallizing the amorphous semiconductor with carbon migration to the surface to form a graphene feature of one or more graphene layers. The epitaxy can be promoted by heating the device or by irradiation with a laser. Methods for fabricating graphene on a variety of substrates, over large areas with controlled thicknesses employ ion implantation or other doping techniques followed by pulsed laser annealing or other annealing techniques that result in solid phase regrowth are presented.
摘要翻译：支撑石墨烯装置包括具有预定形状和图案的1至约10个石墨烯层的至少一个石墨烯特征，每个石墨烯特征的至少一部分被支撑在基底上。在一些实施例中，该器件包括支撑在晶体半导体衬底（例如硅或锗）上的石墨烯特征。晶体半导体衬底上的石墨烯特征可以通过在晶体半导体衬底上形成无定形碳掺杂半导体，然后通过碳迁移到表面来外延结晶非晶半导体来形成一个或多个石墨烯层的石墨烯特征来制造。可以通过加热装置或通过用激光照射来促进外延。提出了在各种基板上制造石墨烯的方法，在具有受控厚度的大面积上采用离子注入或其它掺杂技术，随后进行脉冲激光退火或导致固相再生的其它退火技术。

2. 发明申请

WO2006132957A2 INTEGRATED ELECTRONIC CIRCUITRY AND HEAT SINK 审中-公开
标题翻译：集成电子电路和散热片
公开(公告)号：WO2006132957A2
公开(公告)日：2006-12-14
申请号：PCT/US2006021420
申请日：2006-05-31
申请人： UNIV FLORIDA , LIN JENSHAN , REN FAN , PEARTON STEPHEN J , ANDERSON TRAVIS J , GILA BRENT P
发明人： LIN JENSHAN , REN FAN , PEARTON STEPHEN J , ANDERSON TRAVIS J , GILA BRENT P
IPC分类号： H01L23/373 , H01L23/367 , H01L23/50
CPC分类号： H01L23/552 , H01L23/367 , H01L23/3735 , H01L23/50 , H01L2924/0002 , H01L2924/3011 , H01L2924/00
摘要： A multi-layer heatsink module for effecting temperature control in a three-dimensional integrated chip is provided. The module includes a high thermal conductivity substrate having first and second opposing sides, and a gallium nitride (GaN) layer disposed on the first side of the substrate. An integrated array of passive and active elements defining electronic circuitry is formed in the GaN layer. A metal ground plane having first and second opposing sides is disposed on the second side of the substrate, with the first side of the ground plane being adjacent to the second side of the substrate. A dielectric layer of low thermal dielectric material is deposited on the back side of the ground plane, and a metal heatsink is bonded to the dielectric layer. A via extends through the dielectric layer from the metal heatsink to the metal ground plane.
摘要翻译：提供了一种用于在三维集成芯片中实现温度控制的多层散热模块。该模块包括具有第一和第二相对侧的高导热性衬底和设置在衬底的第一侧上的氮化镓（GaN）层。在GaN层中形成限定电子电路的无源和有源元件的集成阵列。具有第一和第二相对侧的金属接地平面设置在基板的第二侧上，接地平面的第一侧与基板的第二侧相邻。在接地面的背面侧沉积有低介电常数的电介质层，金属散热片与电介质层接合。通孔从金属散热器延伸穿过电介质层到金属接地平面。

3. 发明申请

WO2010096646A2 GRAPHENE PROCESSING FOR DEVICE AND SENSOR APPLICATIONS 审中-公开
标题翻译： GRAPHENE处理设备和传感器应用
公开(公告)号：WO2010096646A2
公开(公告)日：2010-08-26
申请号：PCT/US2010/024723
申请日：2010-02-19
申请人： UNIVERSITY OF FLORIDA RESEARCH FOUNDATION, INC. , APPLETON, Bill, R. , GILA, Brent, P.
发明人： APPLETON, Bill, R. , GILA, Brent, P.
IPC分类号： H01L21/265
CPC分类号： H01L29/78684 , H01L21/26506 , H01L29/16 , H01L29/1606 , H01L29/7781 , H01L29/78603 , Y10T428/24802
摘要： A supported graphene device comprises at least one graphene feature of 1 to about 10 graphene layers having a predetermined shape and pattern, with at least a portion of each graphene feature being supported on a substrate. In some embodiments the device comprises graphene features supported on crystalline semiconductor substrate, such as silicon or germanium. The graphene features on a crystalline semiconductor substrate can be fabricated by forming an amorphous carbon doped semiconductor on the crystalline semiconductor substrate and then epitaxially crystallizing the amorphous semiconductor with carbon migration to the surface to form a graphene feature of one or more graphene layers. The epitaxy can be promoted by heating the device or by irradiation with a laser. Methods for fabricating graphene on a variety of substrates, over large areas with controlled thicknesses employ ion implantation or other doping techniques followed by pulsed laser annealing or other annealing techniques that result in solid phase regrowth are presented.
摘要翻译：被支撑的石墨烯器件包括具有预定形状和图案的1到大约10个石墨烯层的至少一个石墨烯特征，每个石墨烯特征的至少一部分被支撑在衬底上。在一些实施例中，该器件包括支撑在晶体半导体衬底上的石墨烯部件，例如硅或锗。在晶体半导体衬底上的石墨烯特征可以通过在晶体半导体衬底上形成无定形碳掺杂半导体，然后用碳向表面外延结晶非晶半导体以形成一个或多个石墨烯层的石墨烯特征。通过加热器件或通过激光照射可以促进外延。在各种衬底上，在具有可控厚度的大面积上制造石墨烯的方法采用离子注入或其他掺杂技术，随后进行脉冲激光退火或其他导致固相再生长的退火技术。

4. 发明申请

WO2006132957A3 INTEGRATED ELECTRONIC CIRCUITRY AND HEAT SINK 审中-公开
公开(公告)号：WO2006132957A3
公开(公告)日：2006-12-14
申请号：PCT/US2006/021420
申请日：2006-05-31
申请人： UNIVERSITY OF FLORIDA RESEARCH FOUNDATION, INC. , LIN, Jenshan , REN, Fan , PEARTON, Stephen, J. , ANDERSON, Travis, J. , GILA, Brent, P.
发明人： LIN, Jenshan , REN, Fan , PEARTON, Stephen, J. , ANDERSON, Travis, J. , GILA, Brent, P.
IPC分类号： H01L23/373 , H01L23/50 , H01L23/367
摘要： A multi-layer heatsink module for effecting temperature control in a three-dimensional integrated chip is provided. The module includes a high thermal conductivity substrate having first and second opposing sides, and a gallium nitride (GaN) layer disposed on the first side of the substrate. An integrated array of passive and active elements defining electronic circuitry is formed in the GaN layer. A metal ground plane having first and second opposing sides is disposed on the second side of the substrate, with the first side of the ground plane being adjacent to the second side of the substrate. A dielectric layer of low thermal dielectric material is deposited on the back side of the ground plane, and a metal heatsink is bonded to the dielectric layer. A via extends through the dielectric layer from the metal heatsink to the metal ground plane.

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式