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1. 发明申请

WO2011022143A1 CHECKPOINTING IN SPECULATIVE VERSIONING CACHES 审中-公开
标题翻译：检查在频率版本的缓存中
公开(公告)号：WO2011022143A1
公开(公告)日：2011-02-24
申请号：PCT/US2010/042383
申请日：2010-07-19
申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION , EICHENBERGER, Alexandre , GARA, Alan , GSCHWIND, Michael , OHMACHT, Martin
发明人： EICHENBERGER, Alexandre , GARA, Alan , GSCHWIND, Michael , OHMACHT, Martin
IPC分类号： G06F15/00 , G06F9/00
CPC分类号： G06F12/0842 , G06F11/1405
摘要： Mechanisms for generating checkpoints (1030) in a speculative versioning cache (310, 1210) of a data processing system (100) are provided. The mechanisms execute code within the data processing system (100), wherein the code accesses cache lines in the speculative versioning cache (310, 1210). The mechanisms further determine (1350) whether a first condition occurs indicating a need to generate a checkpoint (1030) in the speculative versioning cache (310, 1210). The checkpoint (1310) is a speculative cache line which is made non-speculative in response to a second condition occurring that requires a roll-back of changes to a cache line corresponding to the speculative cache line. The mechanisms also generate the checkpoint (1310) in the speculative versioning cache (310, 1210) in response to a determination that the first condition has occurred.
摘要翻译：提供了用于在数据处理系统（100）的推测版本缓存（310,1210）中生成检查点（1030）的机制。机构在数据处理系统（100）内执行代码，其中代码访问推测版本控制高速缓存（310,1210）中的高速缓存行。这些机制进一步确定（1350）是否发生指示在推测版本控制高速缓存（310,1012）中生成检查点（1030）的第一条件。检查点（1310）是推测性高速缓存行，其响应于需要回滚对与推测性高速缓存行对应的高速缓存行的改变的第二条件而变得不推测。这些机制还响应于确定发生第一条件而在推测版本控制高速缓存（310,1210）中生成检查点（1310）。

2. 发明申请

WO2011080054A1 EXTRACTION OF DATA PARALLELISM 审中-公开
标题翻译：提取数据并行列表
公开(公告)号：WO2011080054A1
公开(公告)日：2011-07-07
申请号：PCT/EP2010/069506
申请日：2010-12-13
申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION , IBM UNITED KINGDOM LIMITED , FLACHS, Brian , JOHNS, Charles, Ray , NUTTER, Mark, Richard , EICHENBERGER, Alexandre
发明人： FLACHS, Brian , JOHNS, Charles, Ray , NUTTER, Mark, Richard , EICHENBERGER, Alexandre
IPC分类号： G06F9/45
CPC分类号： G06F8/452 , G06F8/433
摘要： Mechanisms for extracting data dependencies during runtime are provided. The mechanisms execute a portion of code having a loop and generate, for the loop, a first parallel execution group comprising a subset of iterations of the loop less than a total number of iterations of the loop. The mechanisms further execute the first parallel execution group and determining, for each iteration in the subset of iterations, whether the iteration has a data dependence. Moreover, the mechanisms commit store data to system memory only for stores performed by iterations in the subset of iterations for which no data dependence is determined. Store data of stores performed by iterations in the subset of iterations for which a data dependence is determined is not committed to the system memory.
摘要翻译：提供了在运行时提取数据依赖关系的机制。该机制执行具有循环的一部分代码，并为该循环产生一个第一并行执行组，该并行执行组包括小于该循环迭代次数的循环迭代子集。这些机制进一步执行第一个并行执行组，并确定迭代子集中的每个迭代，迭代是否具有数据依赖性。此外，机制仅将数据存储到系统存储器中，用于仅针对确定数据依赖性的迭代子集中的迭代执行的存储。在确定数据相关性的迭代子集中存储通过迭代执行的存储数据不会提交给系统存储器。

3. 发明申请

WO2011080053A1 DATA PARALLEL FUNCTION CALL FOR DETERMINING IF CALLED ROUTINE IS DATA PARALLEL 审中-公开
标题翻译：数据并行函数调用如果被调用的程序是数据并行调用
公开(公告)号：WO2011080053A1
公开(公告)日：2011-07-07
申请号：PCT/EP2010/069502
申请日：2010-12-13
申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION , IBM UNITED KINGDOM LIMITED , FLACHS, Brian , JOHNS, Charles, Ray , NUTTER, Mark, Richard , EICHENBERGER, Alexandre
发明人： FLACHS, Brian , JOHNS, Charles, Ray , NUTTER, Mark, Richard , EICHENBERGER, Alexandre
IPC分类号： G06F9/38 , G06F9/318 , G06F15/78 , G06F15/80
CPC分类号： G06F9/30072 , G06F8/456 , G06F9/30189 , G06F9/3851 , G06F9/3887
摘要： Mechanisms for performing data parallel function calls in code during runtime are provided. These mechanisms may operate to execute, in the processor, a portion of code having a data parallel function call to a target portion of code. The mechanisms may further operate to determine, at runtime by the processor, whether the target portion of code is a data parallel portion of code or a scalar portion of code and determine whether the calling code is data parallel code or scalar code. Moreover, the mechanisms may operate to execute the target portion of code based on the determination of whether the target portion of code is a data parallel portion of code or a scalar portion of code, and the determination of whether the calling code is data parallel code or scalar code.
摘要翻译：提供了在运行期间执行代码中数据并行函数调用的机制。这些机制可以操作以在处理器中执行具有对目标代码部分的数据并行功能调用的代码的一部分。这些机制可以进一步操作以在运行时由处理器确定目标代码部分是代码的数据并行部分还是代码的标量部分，并确定调用代码是数据并行代码还是标量代码。此外，这些机制可以基于代码的目标部分是代码的数据并行部分还是代码的标量部分的确定来执行代码的目标部分，以及确定调用代码是否是数据并行代码或标量代码。

4. 发明申请

WO2011022142A1 INSERTION OF OPERATION-AND-INDICATE INSTRUCTIONS FOR OPTIMIZED SIMD CODE 审中-公开
标题翻译：操作和指示优化SIMD代码的插入
公开(公告)号：WO2011022142A1
公开(公告)日：2011-02-24
申请号：PCT/US2010/042377
申请日：2010-07-19
申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION , EICHENBERGER, Alexandre , GARA, Alan , GSCHWIND, Michael
发明人： EICHENBERGER, Alexandre , GARA, Alan , GSCHWIND, Michael
IPC分类号： G06F9/45
CPC分类号： G06F8/451 , G06F9/30036 , G06F9/30043 , G06F9/3865 , G06F9/3887
摘要： Mechanisms are provided for inserting indicated instructions for tracking and indicating exceptions in the execution of vectorized code. A portion of first code (620) is received for compilation. The portion of first code (620) is analyzed to identify non-speculative instructions performing designated non-speculative operations in the first code (620) that are candidates for replacement by replacement operation-and-indicate instructions that perform the designated non-speculative operations and further perform an indication operation for indicating any exception conditions corresponding to special exception values (840) present in vector register inputs to the replacement operation-and-indicate instructions (1020). The replacement is performed (1080) and second code (630) is generated based on the replacement of the at least one non-speculative instruction. The data processing system (100) executing the compiled code (630) is configured to store special exception values (840) in vector output registers (1130), in response to a speculative instruction generating an exception condition, without initiating exception handling.
摘要翻译：提供了用于在执行向量化代码中插入指示的跟踪指示和指示异常的机制。第一代码（620）的一部分被接收用于编译。分析第一代码（620）的部分以识别在第一代码（620）中执行指定的非推测性操作的不推测指令，其是通过替换操作指示执行指定的非投机操作的指令来替换的候选并且进一步执行指示操作，用于指示对应于存在于替换操作和指示指令（1020）的向量寄存器输入中的特殊异常值（840）的任何异常条件。执行替换（1080），并且基于所述至少一个非推测性指令的替换来生成第二代码（630）。执行编译代码（630）的数据处理系统（100）被配置为在向量输出寄存器（1130）中存储特殊异常值（840），以响应于产生异常条件的推测指令而不启动异常处理。

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