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1. 发明申请

WO2007037658A1 METHOD FOR FABRICATING NANOSTRUCTURE 审中-公开
标题翻译：制作纳米结构的方法
公开(公告)号：WO2007037658A1
公开(公告)日：2007-04-05
申请号：PCT/KR2006/003939
申请日：2006-09-29
申请人： SEOUL NATIONAL UNIVERSITY INDUSTRY FOUNDATION , KIM, Ki-Bum , PARK, Sang-Hyun
发明人： KIM, Ki-Bum , PARK, Sang-Hyun
IPC分类号： B82B3/00
CPC分类号： B81C1/00111
摘要： A method for fabricating a nanostructure includes forming a silicon oxide layer over a substrate, selectively etching the silicon oxide layer to form a trench with gradually sloped sidewalls, forming a conductive layer over the silicon oxide layer with the trench, forming an aluminum layer over the conductive layer, planarizing a surface of the aluminum layer using chemical mechanical polishing (CMP), anodizing the aluminum layer to form an aluminum oxide layer with an array of nanopores, removing the barrier type aluminum oxide layer underneath the nanopores by performing the anodization overly to thereby expose the conductive layer underneath the nanopores, and growing nanowires inside the individual nanopores using the exposed conductive layer.
摘要翻译：制造纳米结构的方法包括在衬底上形成氧化硅层，选择性地蚀刻氧化硅层以形成具有逐渐倾斜的侧壁的沟槽，在沟槽的氧化硅层之上形成导电层，在其上形成铝层导电层，使用化学机械抛光（CMP）对铝层的表面进行平坦化，阳极氧化铝层以形成具有纳米孔阵列的氧化铝层，通过执行阳极氧化过渡去除纳米孔下方的阻挡型氧化铝层从而将导电层暴露在纳米孔下方，并使用暴露的导电层在单个纳米孔内生长纳米线。

2. 发明申请

WO2002067319A2 COPPER INTERCONNECT STRUCTURE HAVING DIFFUSION BARRIER 审中-公开
标题翻译：具有扩散障碍物的铜互连结构
公开(公告)号：WO2002067319A2
公开(公告)日：2002-08-29
申请号：PCT/US2001/047592
申请日：2001-12-05
申请人： ASM MICROCHEMISTRY OY , ASM AMERICA, INC. , KIM, Ki-Bum , RAAIJMAKERS, Ivo , SOININEN, Pekka, J.
发明人： KIM, Ki-Bum , RAAIJMAKERS, Ivo , SOININEN, Pekka, J.
IPC分类号： H01L21/768
CPC分类号： H01L21/76846 , H01L21/28562 , H01L21/76855 , H01L21/76856 , H01L21/76858 , H01L23/53238 , H01L2924/0002 , H01L2924/00
摘要： The present invention provides a method of fabricating a semiconductor device, which could advance the commercialization of semiconductor devices with a copper interconnect. In a process of metal interconnect line fabrication, a TiN thin film combined with an Al intermediate layer is used as a diffusion barrier on trench or via walls. For the formation, Al is deposited on the TiN thin film followed by copper filling the trench. Al diffuses to TiN layer and reacts with oxygen or nitrogen, which will stuff grain boundaries efficiently, thereby blocking the diffusion of copper successfully.
摘要翻译：本发明提供一种制造半导体器件的方法，其可以通过铜互连促进半导体器件的商业化。在金属互连线制造的过程中，与Al中间层结合的TiN薄膜用作沟槽或通孔壁上的扩散阻挡层。为了形成，Al沉积在TiN薄膜上，随后铜填充沟槽。 Al扩散到TiN层并与氧或氮反应，这将有效地吸收晶界，从而阻止铜的扩散。

3. 发明申请

WO1996042171A1 APPARATUS AND METHOD FOR GENERATING DATA SEGMENT SYNC SIGNAL 审中-公开
标题翻译：用于生成数据段同步信号的装置和方法
公开(公告)号：WO1996042171A1
公开(公告)日：1996-12-27
申请号：PCT/KR1996000086
申请日：1996-06-05
申请人： SAMSUNG ELECTRONICS CO., LTD. , KIM, Ki, Bum
发明人： SAMSUNG ELECTRONICS CO., LTD.
IPC分类号： H04N11/24
CPC分类号： H04N5/08
摘要： An apparatus for generating a sync signal of a data segment in a high definition television is disclosed including: means (41) for delaying and integrating received data segment signals in the period of the segment; means (42) for delaying the output of the integration means in the period of sync signals, multiplying the delayed sync signals by a correlation value of a corresponding sync signal, and summing the multiplied sync signals, to thereby detect a sync signal having its peak for the period of the sync signal; and means (43) having a predetermined reference value and for comparing the output of the sync detecting means with the reference value, to thereby generate the sync signal of data segment. This apparatus is capable of accurately generating segment sync signals in any environment of transmission channel in an HDTV.
摘要翻译：公开了一种用于在高分辨率电视中产生数据段的同步信号的装置，包括：用于在段的周期中延迟和积分接收的数据段信号的装置（41）用于在同步信号的周期中延迟积分装置的输出的装置（42），将延迟的同步信号乘以对应的同步信号的相关值，并将乘法的同步信号相加，从而检测具有其峰值的同步信号对于同步信号的周期; 以及具有预定参考值并用于将同步检测装置的输出与参考值进行比较的装置（43），从而产生数据段的同步信号。该装置能够在HDTV的传输信道的任何环境中精确地生成段同步信号。

4. 发明申请

WO1996042170A1 SYMBOL TIMING RECOVERY CIRCUIT AND METHOD 审中-公开
标题翻译：符号时序恢复电路及方法
公开(公告)号：WO1996042170A1
公开(公告)日：1996-12-27
申请号：PCT/KR1996000085
申请日：1996-06-05
申请人： SAMSUNG ELECTRONICS CO., LTD. , KIM, Ki, Bum
发明人： SAMSUNG ELECTRONICS CO., LTD.
IPC分类号： H04N11/24
CPC分类号： H03L7/091 , H04L7/033 , H04L7/044 , H04N5/08 , H04N5/126 , H04N5/4401 , H04N5/455
摘要： A symbol timing recovery circuit and method of a digital television is disclosed including: an analog-to-digital converter (10) for sampling a received analog signal by a symbol clock to be converted to digital data; demodulator (20) for recovering a carrier wave, demodulating the digital data to a baseband signal and generting a segment signal; a segment synchronizing signal detector (40) for detecting a segment synchronizing signal from the segment signal; a phase error detector (50) activated by the segment synchronizing signal, for receiving the segment signal and detecting a phase error of synchronizing symbols of the segment synchronizing signal; and a symbol clock phase adjuster (60) for adjusting the phase of the symbol clock according to the phase error of the synchronizing symbols to be supplied to the analog-to-digital converter as the symbol clock.
摘要翻译：公开了一种数字电视的符号定时恢复电路和方法，包括：模数转换器（10），用于通过符号时钟对接收的模拟信号进行采样以转换为数字数据; 解调器（20），用于恢复载波，将数字数据解调为基带信号并产生段信号; 分段同步信号检测器（40），用于从所述分段信号中检测分段同步信号; 由段同步信号激活的相位误差检测器（50），用于接收段信号并检测同步段同步信号的符号的相位误差; 以及符号时钟相位调整器（60），用于根据要提供给模数转换器的同步符号的相位误差作为符号时钟调整符号时钟的相位。

5. 发明申请

WO2004074173A1 METHOD OF FORMING QUANTUM LAYER AND PATTERNED STRUCTURE BY MULTIPLE DIP-COATING PROCESS 审中-公开
标题翻译：通过多种DIP涂层工艺形成量子层和形态结构的方法
公开(公告)号：WO2004074173A1
公开(公告)日：2004-09-02
申请号：PCT/KR2004/000350
申请日：2004-02-20
申请人： SEOUL NATIONAL UNIVERSITY INDUSTRY FOUNDATION , KIM, Ki-Bum , YOON, Tae-Sik
发明人： KIM, Ki-Bum , YOON, Tae-Sik
IPC分类号： B82B3/00
CPC分类号： B82Y30/00 , H01L21/02
摘要： The present invention relates to a method of adsorbing quantum dots in a colloid solution on a substrate using a multiple dip-coating process to increase the surface area coverage of quantum dots on the substrate to a level of single layer. Further, this invention relates to a method of forming a uniform pattern of quantum dot clusters on a substrate.
摘要翻译：本发明涉及使用多次浸涂法将基板上的胶体溶液中的量子点吸附在基板上的方法，以将基板上量子点的表面积覆盖率提高至单层。此外，本发明涉及在基板上形成量子点簇的均匀图案的方法。

6. 发明申请

WO2012039533A1 GRAPHENE STRUCTURE, METHOD OF FORMING THE GRAPHENE STRUCTURE, AND TRANSPARENT ELECTRODE INCLUDING THE GRAPHENE STRUCTURE 审中-公开
标题翻译：石墨结构，形成石墨结构的方法和包括石墨结构的透明电极
公开(公告)号：WO2012039533A1
公开(公告)日：2012-03-29
申请号：PCT/KR2011/001642
申请日：2011-03-09
申请人： SNU R&DB FOUNDATION , KIM, Ki Bum , LEE, Hong Hie , KIM, Hyun Mi , CHO, Seong Yong
发明人： KIM, Ki Bum , LEE, Hong Hie , KIM, Hyun Mi , CHO, Seong Yong
IPC分类号： C01B31/02 , C23C16/26 , H01B1/04
CPC分类号： H01L31/1884 , B82Y30/00 , B82Y40/00 , C01B32/184 , C23C14/0605 , C30B1/023 , C30B29/02 , H01L21/02491 , H01L21/02513 , H01L21/02527 , H01L21/02667 , H01L31/022466 , Y02E10/50
摘要： A method of forming graphene using an amorphous carbon layer and a solar cell including graphene formed by using the method. The method of forming graphene includes: forming an amorphous carbon layer on a substrate; forming a graphitizing catalyst layer on the amorphous carbon layer; and heat treating the amorphous carbon layer and the graphitizing catalyst layer to crystallize the amorphous carbon layer, thereby forming a graphene layer on the graphitizing catalyst layer.
摘要翻译：使用无定形碳层形成石墨烯的方法和使用该方法形成的包括石墨烯的太阳能电池。形成石墨烯的方法包括：在基材上形成无定形碳层; 在所述无定形碳层上形成石墨化催化剂层; 对无定形碳层和石墨化催化剂层进行热处理，使无定形碳层结晶，由此在石墨化催化剂层上形成石墨烯层。

7. 发明申请

WO2009084775A1 RESIST FOR E-BEAM LITHOGRAPHY 审中-公开
标题翻译：电子束光刻电阻
公开(公告)号：WO2009084775A1
公开(公告)日：2009-07-09
申请号：PCT/KR2008/002452
申请日：2008-04-30
申请人： SEOUL NATIONAL UNIVERSITY INDUSTRY FOUNDATION , YOON, Do-Yeung , KIM, Ki-Bum
发明人： YOON, Do-Yeung , KIM, Ki-Bum
IPC分类号： G03F7/004
CPC分类号： G03F7/0757 , G03F7/0758
摘要： A resist for E-beam lithography is provided. To be specific, provided is a negative resist in which two kinds of organic siloxane compounds are copolymerized. The resist for E-beam lithography makes it possible to manufacture a semiconductor device with further improved quality because the resist is highly sensitive to E-beam, easily prepared, and has uniform properties even though it is stored for a long time.
摘要翻译：提供电子束光刻抗蚀剂。具体而言，提供两种有机硅氧烷化合物共聚的负性抗蚀剂。用于电子束光刻的抗蚀剂使得可以制造具有进一步提高的质量的半导体器件，因为抗蚀剂对电子束具有高度敏感性，容易制备，并且即使长期存储也具有均匀的性质。

8. 发明申请

WO2009072818A2 TOTAL PRODUCT DEVELOPMENT AND MANAGEMENT SYSTEM AND PRODUCT MODELING METHOD FOR THE SAME 审中-公开
标题翻译：总产品开发与管理系统及其相关产品建模方法
公开(公告)号：WO2009072818A2
公开(公告)日：2009-06-11
申请号：PCT/KR2008/007164
申请日：2008-12-04
申请人： TMAXSOFT. CO., LTD. , PARK, Dae Yeon , KIM, Byung Bum , KIM, Ki Bum , PARK, Sang Gil
发明人： PARK, Dae Yeon , KIM, Byung Bum , KIM, Ki Bum , PARK, Sang Gil
IPC分类号： G06Q99/00
CPC分类号： G06Q90/00
摘要： Disclosed are an integrated product development and management system capable of in- tegratedly managing and providing product attributes and product rules, and defining products by combinations of product attributes and product rules, thereby maximizing flexibility and expansibility of product development, and a product modeling method. An integrated product development and management system that automates product development, release, and management includes a typical information storage section that stores typical information regarding products, such as product structures, product attributes, and services being dependent on and constituting products; an atypical information storage section that stores atypical information (Rule) indicating rules for products, such as product rules, condition rules, process rules, and the like; a product modeling section that generates product nodes in a hierarchical structure of business areas, product groups, products/services, and product attributes, and models products by defining/combining the typical information stored in the typical information storage section and the atypical information stored in the atypical information storage section; a rule engine that generates a source code of the atypical information; and a deploy manager that delivers and applies product information generated and managed by the integrated product development and management system to a transaction processing system.
摘要翻译：公开了一个集成的产品开发和管理系统，能够集中管理和提供产品属性和产品规则，并通过产品属性和产品规则的组合定义产品，从而最大限度地提高产品开发的灵活性和可扩展性，以及产品建模方法。自动化产品开发，发布和管理的集成产品开发和管理系统包括典型的信息存储部分，其存储关于产品的典型信息，例如产品结构，产品属性和依赖于和构成产品的服务; 存储指示产品规则的非典型信息（Rule）的非典型信息存储部分，例如产品规则，条件规则，处理规则等; 产品建模部分，通过定义/组合存储在典型信息存储部分中的典型信息和存储在其中的非典型信息来生成业务领域，产品组，产品/服务和产品属性的分层结构中的产品节点非典型信息存储部分; 生成非典型信息的源代码的规则引擎; 以及一个部署经理，将由集成产品开发和管理系统生成和管理的产品信息提供并应用于事务处理系统。

9. 发明申请

WO02067319A8 COPPER INTERCONNECT STRUCTURE HAVING DIFFUSION BARRIER 审中-公开
标题翻译：具有扩散障碍物的铜互连结构
公开(公告)号：WO02067319A8
公开(公告)日：2004-02-26
申请号：PCT/US0147592
申请日：2001-12-05
申请人： ASM INT , KIM KI-BUM , RAAIJMAKERS IVO , SOININEN PEKKA J
发明人： KIM KI-BUM , RAAIJMAKERS IVO , SOININEN PEKKA J
IPC分类号： C23C16/20 , C23C16/34 , H01L21/28 , H01L21/285 , H01L21/3205 , H01L21/768 , H01L23/52 , H01L23/532
CPC分类号： H01L21/76846 , H01L21/28562 , H01L21/76855 , H01L21/76856 , H01L21/76858 , H01L23/53238 , H01L2924/0002 , H01L2924/00
摘要： The present invention provides a method of fabricating a semiconductor device, which could advance the commercialization of semiconductor devices with a copper interconnect. In a process of metal interconnect line fabrication, a TiN thin film (32) combined with an Al intermediate layer (34) is used as a diffusion barrier on trench or via walls. For the formation, Al is deposited on the TiN thin film followed by copper filling the trench. Al diffuses to TiN layer and reacts with oxygen or nitrogen, which will stuff grain boundaries efficiently, thereby blocking the diffusion of copper successfully.
摘要翻译：本发明提供一种制造半导体器件的方法，其可以通过铜互连促进半导体器件的商业化。在金属互连线制造的过程中，将与Al中间层（34）组合的TiN薄膜（32）用作沟槽或通孔壁上的扩散阻挡层。为了形成，Al沉积在TiN薄膜上，随后铜填充沟槽。 Al扩散到TiN层并与氧或氮反应，这将有效地吸收晶界，从而阻止铜的扩散。

10. 发明申请

WO0075964A3 METHOD OF FABRICATING SEMICONDUCTOR DEVICE EMPLOYING COPPER INTERCONNECT STRUCTURE 审中-公开
标题翻译：制造铜连接结构的半导体器件制造方法
公开(公告)号：WO0075964A3
公开(公告)日：2001-03-15
申请号：PCT/KR9900847
申请日：1999-12-30
申请人： KIM KI BUM
发明人： KIM KI-BUM
IPC分类号： H01L21/28 , H01L21/768 , H01L23/532 , H01L23/52 , H01L23/535
CPC分类号： H01L21/76846 , H01L21/76843 , H01L21/76856 , H01L21/76876 , H01L23/53238 , H01L2924/0002 , H01L2924/00
摘要： The present invention provides a method of forming interconnect structure in a process for fabricating semiconductor device, which enables high-reliability copper interconnect. The present invention uses the structure comprised of TiN layer (32) and intermediate aluminum layer (34) as a diffusion barrier. A copper layer (40) is deposited on the aluminum layer (34), after aluminum layer (34) is deposited on the TiN layer (32). At this time, with the aluminum layer (34) being made to the minimum thickness, metallization is formed substantially with the copper.
摘要翻译：本发明提供一种在制造半导体器件的工艺中形成互连结构的方法，其实现了高可靠性铜互连。本发明使用由TiN层（32）和中间铝层（34）构成的结构作为扩散阻挡层。在铝层（34）沉积在TiN层（32）上之后，在铝层（34）上沉积铜层（40）。此时，使铝层（34）制成最小厚度，金属化基本上与铜形成。

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