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81. 发明申请

WO2003046773A1 METODO Y CIRCUTERIA PARA ANALISIS Y TEST FUNCIONAL DE CIRCUITOS DIGITALES DE GRAN DIMENSION MEDIANTE EMULADORES HARDWARE 审中-公开
标题翻译：使用硬件仿真器进行大数字电路功能测试和分析的方法与电路
公开(公告)号：WO2003046773A1
公开(公告)日：2003-06-05
申请号：PCT/ES2002/000571
申请日：2002-11-29
申请人： UNIVERSIDAD DE SEVILLA , AGUIRRE ECHANOVE, Miguel Angel , TOMBS, Jonathan , TORRALBA SILGADO, Antonio , GARCIA FRANQUELO, Leopoldo
发明人： AGUIRRE ECHANOVE, Miguel Angel , TOMBS, Jonathan , TORRALBA SILGADO, Antonio , GARCIA FRANQUELO, Leopoldo
IPC分类号： G06F17/50
CPC分类号： G01R31/318342 , G01R31/318307 , G01R31/31835 , G01R31/318364 , G06F11/261
摘要： Parte de un número indefinido de eventos o condiciones (1), (1')... (1 n ), respectivos circuitos detectores (2), (2')... (2 n ), actuantes en combinación con un detector de flanco (3), que recibe información del "pad externo de reactivación" (4), y mediante un "pad externo (5) de control del sistema", es posible vigilar tanto eventos deterministas como eventos temporales, concretamente vigilar una condición determinista en tiempo de ejecución, vigilar una condición temporal en tiempo de ejecución, generar una señal o bandera que registre el evento, cualquiera que sea su naturaleza, congelar el circuito para facilitar su análisis desde un sistema gráfico o similar, y comunicar al sistema que se ha producido un evento e identifícar cuál de los eventos programados se ha producido.
摘要翻译：本发明涉及使用硬件仿真器对大数字电路进行功能测试和分析的方法和电路。本发明的方法是基于事件或条件（1），（1'）...（1 ）的无限期数。根据本发明，相应的检测器电路（2），（2'）...（2n）与从外部再激活焊盘（4）接收信息的边缘检测器（3）相互作用。外部系统控制板（5）可用于：监视确定性和时间事件; 更具体地，在运行时间中监视确定性条件和时间条件; 生成一个信号或标志，注册事件，无论其性质如何; 冻结电路，以利于使用图形系统等进行分析; 与系统通信事件已发生，并确定发生了哪些编程事件。

82. 发明申请

WO01084315A2 COMPUTER APPARATUSES AND PROCESSES FOR ANALYZING A SYSTEM HAVING CUMULATIVE AND COMPETING CAUSE FAILURE MODES 审中-公开
标题翻译：用于分析具有累积和竞争性原因故障模式的系统的计算机设备和过程
公开(公告)号：WO01084315A2
公开(公告)日：2001-11-08
申请号：PCT/US2001/014361
申请日：2001-05-03
IPC分类号： G06F11/00 , G06F11/26
CPC分类号： G06F11/261 , G06F11/008 , Y02P90/14 , Y02P90/26
摘要： Computer apparatuses and processes for analyzing a system are provided. The apparatuses and processes incorporate the steps of collecting data from a first system, wherein the first system has a plurality of cumulative cause failure modes and a plurality of competing cause failure modes and the data relates to said failure modes, parameterizing the data for use in a computerized simulation of a second system, and executing a simulation of the second system. The execution of the simulation also includes the steps of calculating a first uptime for each failure mode based upon the data collected from the first system, determining which of the cumulative cause failure modes and competing cause failure modes causes a first loss event of the second system by selecting the smallest value of the first uptimes, and if the failure mode which causes the first loss event of the second system is one of the plurality of cumulative cause failure modes, then calculating a second uptime for only the cumulative cause failure mode which causes the first loss event for the second system and calculating a second uptime for each one of the plurality of competing cause failure modes.
摘要翻译：提供了用于分析系统的计算机设备和过程。所述设备和处理包括从第一系统收集数据的步骤，其中所述第一系统具有多个累积原因故障模式和多个竞争原因故障模式，并且所述数据涉及所述故障模式，参数化所述数据用于第二系统的计算机化仿真，以及执行第二系统的模拟。仿真的执行还包括以下步骤：基于从第一系统收集的数据计算每个故障模式的第一正常运行时间，确定累积原因故障模式和竞争原因故障模式中的哪一个导致第二系统的第一损失事件通过选择第一递增时间的最小值，如果导致第二系统的第一损失事件的故障模式是多个累积原因故障模式之一，则仅计算导致的累积原因故障模式的第二正常运行时间所述第二系统的第一损失事件并且为所述多个竞争原因故障模式中的每一个计算第二正常运行时间。

83. 发明申请

WO00025240A1 SIMULATOR ARCHITECTURE 审中-公开
标题翻译：模拟器架构
公开(公告)号：WO00025240A1
公开(公告)日：2000-05-04
申请号：PCT/US1999/021181
申请日：1999-09-14
IPC分类号： G06F11/26 , G06F17/50 , G06F13/00
CPC分类号： G06F17/5022 , G06F11/261
摘要： A simulator particularly suited for simulating the hardware/software behavior of embedded systems. The architecture of the simulator permits the hardware and software systems to be modeled as modules (15) with well characterized behaviors. A concise module definition syntax is used to describe module behaviors, and a translator (150) operates upon the module to abstract operations of module behaviors at a level which does not require cycle-based, direct interaction of each module with the underlying simulation engine.
摘要翻译：特别适用于模拟嵌入式系统的硬件/软件行为的模拟器。模拟器的架构允许硬件和软件系统被建模为具有良好表征的行为的模块（15）。简单的模块定义语法用于描述模块行为，并且翻译器（150）对模块进行操作，以在不需要每个模块与底层模拟引擎的基于循环的直接交互的水平上抽象模块行为的操作。

84. 发明申请

WO99059063A1 FIELD PROGRAMMABLE GATE ARRAY (FPGA) EMULATOR FOR DEBUGGING SOFTWARE 审中-公开
标题翻译：用于调试软件的现场可编程门阵列（FPGA）仿真器
公开(公告)号：WO99059063A1
公开(公告)日：1999-11-18
申请号：PCT/US1999/010123
申请日：1999-05-07
IPC分类号： G06F11/26 , G06F11/36 , G06F11/00 , G06F9/455
CPC分类号： G06F11/3652 , G06F11/261
摘要： An emulator is used to debug sofware operating on a target micro-controller in a target circuit environment. The emulator contains a field programmable gate array that is programmed to contain an emulated target micro-controller and an emulated monitoring circuit which monitors the operations of the micro-controller. The emulated target micro-controller receives signals from the target circuit environment. The signals from the target circuit environment are communicated to the emulated target micro-controller by one or more channels, such as a data channel and a timing channel. The number of channels is limited so that signals from the target environment do not degrade the performance of the emulator. A host computer contains a software debug program which works with the emulated monitoring circuit to monitor the emulated micro-controller. The FIELD PROGRAMMABLE GATE ARRAY is programmed to have the characteristics of one or more types of memory, for example ROM, PROM and EEPROM to emulate the different types of memory.
摘要翻译：仿真器用于在目标电路环境中对目标微控制器上的软件进行调试。仿真器包含一个现场可编程门阵列，可编程为包含仿真目标微控制器和一个监控微控制器运行的仿真监控电路。仿真目标微控制器从目标电路环境接收信号。来自目标电路环境的信号通过一个或多个信道（诸如数据信道和定时信道）传送到仿真目标微控制器。信道数量受到限制，使得来自目标环境的信号不会降低仿真器的性能。主计算机包含一个软件调试程序，它与仿真监控电路一起工作，以监视仿真的微控制器。现场可编程门阵列被编程为具有一种或多种类型的存储器的特性，例如ROM，PROM和EEPROM来模拟不同类型的存储器。

85. 发明申请

WO99006927A1 METHOD AND APPARATUS FOR VERIFYING, ANALYZING AND OPTIMIZING A DISTRIBUTED SIMULATION 审中-公开
标题翻译：用于验证，分析和优化分布式仿真的方法和装置
公开(公告)号：WO99006927A1
公开(公告)日：1999-02-11
申请号：PCT/US1998/015946
申请日：1998-07-30
IPC分类号： G06F11/26 , G06F11/34 , G06F17/50
CPC分类号： G06F11/261 , G06F11/3457 , G06F11/3495 , G06F17/5009
摘要： A method and apparatus for verifying, analyzing and optimizing a distributed simulation conducted on one or more simulation components from one or more control computers where the present invention may be overlaid onto a distributed simulation as may be conducted by technologies now known for conducting such simulations, where each simulation component has simulator middleware which is operatively connected to a control computer and where the control computer has agent-applications which it may send to the simulator middleware of one or more selected simulation components to perform a task such as gathering data about a simulation entity and return that data to the control computer for subsequent analysis such as calculating average characteristics or effectiveness of simulation components and having tools for optimizing the distributed simulation by modifying or creating agent-applications to send to selected simulators which change the parameters of the distributed simulation and re-run the distributed simulations.
摘要翻译：一种用于验证，分析和优化从一个或多个控制计算机进行的一个或多个仿真部件的分布式仿真的方法和装置，其中本发明可以覆盖在分布式仿真上，可以通过现在已知的用于进行这种模拟的技术进行，其中每个模拟组件具有可操作地连接到控制计算机的模拟器中间件，并且其中控制计算机具有可以向仿真器中间件发送一个或多个所选模拟组件的代理应用程序，以执行诸如收集关于模拟的数据的任务并将该数据返回到控制计算机进行后续分析，例如计算模拟组件的平均特性或有效性，并具有通过修改或创建代理应用程序来优化分布式仿真以发送给选择的模拟器的工具，这些模拟器改变分布式仿真的参数并重新运行分布式仿真。

86. 发明申请

WO1997050038A1 METHOD AND APPARATUS FOR EMULATING A NETWORK OF STATE MONITORING DEVICES 审中-公开
标题翻译：用于模拟状态监测设备网络的方法和装置
公开(公告)号：WO1997050038A1
公开(公告)日：1997-12-31
申请号：PCT/US1997011241
申请日：1997-06-27
申请人： MCI COMMUNICATIONS CORPORATION
发明人： MCI COMMUNICATIONS CORPORATION , MCLAIN, John, V., Jr.
IPC分类号： G06F13/00
CPC分类号： H04W24/00 , G06F11/261
摘要： A system for emulating a change of state (COS) report network (200) fully tests a monitor and/or control system (MCS) (104). The communication and behavior of a COS report network are emulated for selected report network configurations, events and/or indications. A communication module (220) communicates with the MCS through emulator links (108) using a communications protocol used in the emulated report network. A configuration database (210) stores configuration data representing the current status of the report network of state monitoring devices. In response to MCS polling, an emulator message generator (255) generates intelligent response based on the configuration data which emulate communications from a report network of state monitoring devices to the MCS in response to such MCS polling. Simulated multi-tasking and dynamic user-interface (225) control options are included.
摘要翻译：用于模拟状态变化（COS）报告网络（200）的系统完全测试监视器和/或控制系统（MCS）（104）。 COS报告网络的通信和行为将针对所选报告网络配置，事件和/或指示进行仿真。通信模块（220）使用仿真报告网络中使用的通信协议通过仿真器链路（108）与MCS通信。配置数据库（210）存储表示状态监视装置的报告网络的当前状态的配置数据。响应于MCS轮询，仿真器消息发生器（255）响应于这种MCS轮询，基于模拟从状态监视设备的报告网络到MCS的通信的配置数据生成智能响应。包括模拟多任务和动态用户界面（225）控制选项。

87. 发明申请

WO1997049035A1 EMULATOR 审中-公开
标题翻译：仿真器
公开(公告)号：WO1997049035A1
公开(公告)日：1997-12-24
申请号：PCT/JP1996001673
申请日：1996-06-18
申请人： HITACHI, LTD. , HITACHI MICROCOMPUTER SYSTEM, LTD. , HASHIMOTO, Tadashi , ISHIKAWA, Yasushiro , AOTO, Yoshikazu , FUJITA, Shuya , SASAKI, Hiroyuki , SHIMURA, Yasunori , YAMAZAKI, Takanaga , SUGIHARA, Noboru
发明人： HITACHI, LTD. , HITACHI MICROCOMPUTER SYSTEM, LTD.
IPC分类号： G06F11/22
CPC分类号： G06F11/261
摘要： An emulator is used for evaluating a target system (3) utilizing a first single-chip microcomputer incorporating a ROM. A second single-chip microcomputer (5) instead of the first microcomputer controls the target system (3). By taking such a trend that the capacity of the above-mentioned ROM has been increasing into consideration, a built-in substitutive RAM (56) of the second microcomputer and an external substitutive RAM (15) externally provided are used in place of the ROM. An access area control means (57) changes the address arrangement of the RAM (56) with respect to the RAM (15). Since the RAM (56) can be relocated within the range of the arrangement address of the ROM, the system debugging is performed by operating all the area of the ROM at an actual operating frequency by using the RAM (56) even when it is impossible to substitute the RAM (56) for all areas of the ROM.
摘要翻译：仿真器用于利用包含ROM的第一单片微机来评估目标系统（3）。代替第一微型计算机的第二单片机（5）控制目标系统（3）。通过采用上述ROM的容量增加的趋势，使用第二微型计算机的内置替代RAM（56）和外部设置的外部替代RAM（15）来代替ROM 。访问区域控制装置（57）改变RAM（56）相对于RAM（15）的地址排列。由于RAM（56）可以在ROM的布置地址的范围内重新定位，所以即使不可能，也可以通过使用RAM（56）以实际工作频率操作ROM的所有区域来执行系统调试以将RAM（56）替换为ROM的所有区域。

88. 发明申请

WO1997047981A1 DIGITAL LOGIC SIMULATION/EMULATION SYSTEM 审中-公开
标题翻译：数字逻辑仿真/仿真系统
公开(公告)号：WO1997047981A1
公开(公告)日：1997-12-18
申请号：PCT/US1997010266
申请日：1997-06-12
申请人： TZORI, Yiftach
IPC分类号： G01R31/28
CPC分类号： G06F17/5027 , G06F11/261
摘要： A digital logic simulation/emulation system (20), that includes a hardware pod (32) having configurable-logic ICs (36) arranged to provide a plurality of stimulus/response cells (72), is adapted for coupling to a digital logic circuit (316). The stimulus/response cells (72), which provide stimulus signals to the digital logic circuit (316), connect to form a shift-register for downloading stimulus-control data (252), and for uploading response data (262) during a stimulation-response cycle. A logic-configuration library (86) stores configuration-data for establishing a bit-slice architecture for the stimulus/response cells (72). To facilitate preparing the configuration-data, the system also includes a configurable-logic-specification process (224) having a GUI user interface. The logic-specification process (224) assigns pre-established, bit-slice configuration data for each stimulus/response cells (72) to specific locations throughout a configurable-logic IC (36) to achieve swift compilation of configuration data.
摘要翻译：包括布置成提供多个激励/响应单元（72）的可配置逻辑IC（36）的硬件盒（32）的数字逻辑仿真/仿真系统（20）适于耦合到数字逻辑电路（316）。向数字逻辑电路（316）提供刺激信号的刺激/响应单元（72）连接以形成用于下载刺激控制数据（252）的移位寄存器，以及用于在刺激期间上载响应数据（262）响应周期。逻辑配置库（86）存储用于为刺激/响应单元（72）建立位片结构的配置数据。为了便于准备配置数据，该系统还包括具有GUI用户界面的可配置逻辑规范过程（224）。逻辑规范过程（224）将针对每个刺激/响应单元（72）的预先建立的位片配置数据分配给整个可配置逻辑IC（36）中的特定位置，以实现配置数据的快速编译。

89. 发明申请

WO1993005412A1 AREA LIGHT SWITCH 审中-公开
标题翻译：区域开关
公开(公告)号：WO1993005412A1
公开(公告)日：1993-03-18
申请号：PCT/US1992007368
申请日：1992-08-31
申请人： FROST CONTROLS, INC.
发明人： FROST CONTROLS, INC. , DOGUL, James , SARKAR, Sandip , THOMSON, Frederick , THOMSON, Robert
IPC分类号： G01V09/04
CPC分类号： H01H47/002 , F16P3/144 , G01V8/20 , G06F11/0757 , G06F11/261 , G08B13/183
摘要： A photodetection system and related circuitry designed to sense the intrusion of an opaque object in light plane. The system comprises a SYSTEM microcontroller (1) and a WATCHDOG microcontroller (2), both of which operate an output control device (11) of the light curtain switch of the invention, wherein the output control device (11) comprises a plurality of electromechanical relays (13, 14). Both microcontrollers also perform system hardware and software integrity checks. Furthermore, the WATCHDOG microcontroller (2) evaluates the performance of the SYSTEM MICROCONTROLLER (1) by transmitting a false intrusion signal to a photosource (3), determining whether the false signal has been detected, and then verifying that the SYSTEM microcontroller (1) has initiated the machine-stopping sequence. The machine-stopping sequence may be overridden by the WATCHDOG microcontroller (2), or it may be initiated if the false signal is not detected.

90. 发明申请

WO1992012480A1 TRANSACTION SYSTEM EMULATOR 审中-公开
标题翻译：交易系统仿真器
公开(公告)号：WO1992012480A1
公开(公告)日：1992-07-23
申请号：PCT/US1992000144
申请日：1992-01-09
申请人： VERIFONE, INC.
发明人： VERIFONE, INC. , KANNADY, Danny, O. , HORNER, William, McPherson , RAO, Srinivasan
IPC分类号： G06F09/455
CPC分类号： G09B19/0053 , G06F11/261 , G06F11/3414 , G06F11/3476 , G06F13/105 , G06F2201/87
摘要： A transaction system emulator serves to emulate various transaction system peripherals, replacing each emulated hardware peripheral by a corresponding software counterpart and an interconnection between the computer performing emulation and the transaction system hardware. Thus, one or more input devices (102) are replaced with logs of input data (105) such that the system being emulated can be tested without requiring a significant amount of input test data to be manually entered. Sets of test data may be captured either utilizing the emulator system with actual peripheral input devices (102), or obtained from an actual transaction system including such input devices. Alternatively, input test data logs (105) are created by other means, such as by a program, text editor, or the like. An output log of data resulting from input test data is created and, if desired, compared against a log of known, valid data corresponding to the input test data.
摘要翻译：交易系统仿真器用于模拟各种交易系统外围设备，由相应的软件对应物代替每个仿真的硬件外围设备，以及执行仿真的计算机和交易系统硬件之间的互连。因此，将一个或多个输入设备（102）替换为输入数据（105）的日志，使得可以测试被仿真的系统，而不需要手动输入大量的输入测试数据。可以使用具有实际外围设备输入设备（102）的仿真器系统或从包括这样的输入设备的实际交易系统获得的测试数据集。或者，输入测试数据日志（105）是通过其他方式创建的，例如通过程序，文本编辑器等。创建由输入测试数据产生的数据的输出日志，如果需要，与对应于输入测试数据的已知有效数据的日志进行比较。

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