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71. 发明申请

WO02067431A9 DIFFERENTIAL ANALOG-TO-DIGITAL CONVERTER 审中-公开
标题翻译：差分模拟数字转换器
公开(公告)号：WO02067431A9
公开(公告)日：2002-11-07
申请号：PCT/US0204411
申请日：2002-02-14
申请人： SARNOFF CORP
发明人： HSUEH FU-LUNG
IPC分类号： H03M1/06 , H03M1/46 , H03M1/12
CPC分类号： H03M1/0682 , H03M1/46
摘要： A method and system for converting a plurality of input signals (20, 30) being indicative of a signal to be a digital output (50) including: setting a plurality of codes (62, 72) each being indicative of a corresponding reference level; and, for each one of the codes, converting (DA1+...DA4+) the one code to a first analog signal, and summing (80) the first analog signal with a first of the input signals (20) to provide a first summed signal; complementing (110) the one of code to provide a complemented code, converting (DA1-...DA4-) the complemented code to a second analog signal; summing (90) the second analog signal with a second of the input signals (30) to provide a second summed signal corresponding to the first summed signal. The corresponding first and second summed signals are compared (10) to provide a comparison signal. At least a portion of the digital output is set according to the comparison signal.
摘要翻译：一种用于将指示作为数字输出（50）的信号的多个输入信号（20,30）转换的方法和系统，包括：设置多个代码（62,72），每个代码指示相应的参考电平; 并且对于每个代码，将所述一个代码（DA1 + ... DA4 +）转换为第一模拟信号，并且用第一输入信号（20）对（80）第一模拟信号求和（80）以提供第一相加信号; 补充（110）代码以提供补码，将补码代码（DA1 -...DA4-）转换为第二模拟信号; 用第二个输入信号（30）对第二模拟信号求和（90），以提供对应于第一相加信号的第二加法信号。比较相应的第一和第二相加信号（10）以提供比较信号。根据比较信号设定数字输出的至少一部分。

72. 发明申请

WO0141310A9 DIGITAL-TO-ANALOG CONVERTER 审中-公开
标题翻译：数字到模拟转换器
公开(公告)号：WO0141310A9
公开(公告)日：2002-10-03
申请号：PCT/JP0008248
申请日：2000-11-22
申请人： YAMAHA CORP , NORO MASAO , TODA AKIHIKO
发明人： NORO MASAO , TODA AKIHIKO
IPC分类号： H03M1/68 , H03M1/06 , H03M1/72 , H03M1/74 , H03M1/76
CPC分类号： H03M1/0619 , H03M1/687 , H03M1/745 , H03M1/765
摘要： A decoder (21) selects one of FETs (F0 to F255) based on higher bits, and applies one of the voltages divided by a series circuit of resistors (r0 to r255) to an operational amplifier (40). Switches (30 to 33) of a current adder circuit (22) are switched by lower bits to turn on and off FETs (35 to 38). The currents flowing through the conducting FETs are combined, and the resulting current flows to a resistor (ra), across which a voltage appears. The operational amplifier (40) combines two input voltages to produce an output. A FET (24) and FETs (35 to 38) form a current mirror circuit, which prevents the voltage width of each LSB of higher and lower bits from changing if the current (i) through the series circuit of resistors (r0 to r255) changes because of irregularities of manufacturing processes.
摘要翻译：解码器（21）基于较高位选择FET（F0〜F255）中的一个，并且将由电阻（r0〜r255）的串联电路分压的电压中的一个施加到运算放大器（40）。电流加法器电路（22）的开关（30〜33）由低位开关导通和截止FET（35〜38）。流过导通FET的电流被组合，并且所得到的电流流向电阻（ra），电阻出现在电阻（ra）上。运算放大器（40）组合两个输入电压以产生输出。 FET（24）和FET（35〜38）形成电流镜电路，如果电流（i）通过电阻（r0〜r255）的串联电路，则阻止高位和低位的每个LSB的电压宽度改变，由于制造过程的不规则而改变。

73. 发明申请

WO0124537A9 METHOD AND APPARATUS FOR PEAK TRACKING A BASEBAND SIGNAL 审中-公开
标题翻译：用于峰值跟踪基带信号的方法和装置
公开(公告)号：WO0124537A9
公开(公告)日：2002-08-08
申请号：PCT/US0041026
申请日：2000-09-27
申请人： PARTHUS TECHNOLOGIES PLC , SILICON SYSTEMS US INC , OBRIEN JEREMIAH CHRISTOPHER
发明人： OBRIEN JEREMIAH CHRISTOPHER
IPC分类号： H03D3/00 , H03J7/06 , H03L7/197 , H03M1/06 , H03M1/12 , H03M1/36 , H04B17/00 , H04L12/56 , H04L25/06
CPC分类号： H04W24/00 , H03D3/008 , H03J7/065 , H03L7/1976 , H03M1/0607 , H03M1/12 , H03M1/36 , H04B17/20 , H04L25/062 , H04W88/02
摘要： A method that involves tracking the maximum peaks of a signal and tracking the minimum peaks of a signal. Then, calculating the midpoint between the maximum and minimum peaks and thresholding the signal against said midpoint. An apparatus (800) having a maximum peak tracking unit (801) for tracking the maximum peaks of a signal and a minimum peak tracking unit (802) for tracking the minimum peaks of a signal. The apparatus (800) further includes a midpoint calculator unit (803) that receives the maximum tracked peaks and the minimum tracked peaks to determine the midpoint between the maximum and minimum tracked peaks. The apparatus (800) also includes a comparator (805) that receives the signal and the midpoint.
摘要翻译：一种涉及跟踪信号的最大峰值并跟踪信号的最小峰值的方法。然后，计算最大和最小峰值之间的中点，并针对所述中点阈值化信号。一种具有用于跟踪信号的最大峰值的最大峰值跟踪单元（801）和用于跟踪信号的最小峰值的最小峰值跟踪单元（802）的装置（800）。装置（800）还包括中点计算器单元（803），其接收最大跟踪峰值和最小跟踪峰值，以确定最大和最小跟踪峰值之间的中点。装置（800）还包括接收信号和中点的比较器（805）。

74. 发明申请

WO0193498A3 Multiple access system for communications network 审中-公开
标题翻译：用于通信网络的多址系统
公开(公告)号：WO0193498A3
公开(公告)日：2002-04-25
申请号：PCT/GB0102395
申请日：2001-05-25
申请人： UNITT BRIAN , GRANT MICHAEL , TATE CHRISTOPHER , WALLACE ANDREW , ALGIE GLEN , NORTEL NETWORKS LTD
发明人： UNITT BRIAN , GRANT MICHAEL , TATE CHRISTOPHER , WALLACE ANDREW , ALGIE GLEN
IPC分类号： H04B10/00 , H03M1/06 , H03M1/68 , H03M1/76 , H04B10/207 , H04B10/22 , H04J14/02 , H04L12/28 , H04L12/44 , H04L12/56 , H04L29/08 , H04Q11/00 , H04Q7/20
CPC分类号： H04L12/2856 , H04B10/272 , H04J14/0226 , H04J14/0247 , H04J14/0252 , H04L12/2861 , H04L12/2881 , H04L12/2885 , H04L69/324 , H04Q11/0066 , H04Q11/0067 , H04Q11/0071 , H04Q2011/0064
摘要： A communications network (e.g. fibre to the home (FTTH) or wireless) comprises a head end, to which outstations are coupled via a shared point-to-multipoint medium. The head end is arranged to transmit downstream to the outstations a sequence of frames comprising data frames and command frames. The command frames marshal control of upstream transmissions from the outstations. A first downstream command frame directed to a specific outstation indicates the beginning of a timeslot, and also indicates the time slot duration (including an indefinite duration). Where the duration is indefinite, a second command frame directed to at least the same outstation indicates the end of the allotted time slot. Further methods are provided to optimise timeslot allocation, and to support addition and removal of outstations on the network.

75. 发明申请

WO02029806A1 RECONSTRUCTION OF NONUNIFORMLY SAMPLED BANDLIMITED SIGNALS 审中-公开
标题翻译：重新建立非均匀采样带宽信号
公开(公告)号：WO02029806A1
公开(公告)日：2002-04-11
申请号：PCT/SE2001/002105
申请日：2001-09-28
IPC分类号： H03M1/06 , H03M1/08 , H03M1/12 , G11B20/00 , H03M1/00
CPC分类号： H03M1/0626 , H03M1/0836 , H03M1/1215
摘要： The present invention refers to a method and apparatus for reconstruction of a nonuniformly sampled bandlimited analog signal xa(t), said nonuniformly sampled signal comprising N subsequences xk(m), k = 0, 1, ..., N-1, N ≥ 2, obtained through sampling at a sampling rate of 1/(MT) according to xk(m) = xa(nMT+tk), where M is an integer, and tk = kMT/N + &Dgr;tk, &Dgr;tk being different from zero. The invention comprises forming a new sequence y(n) from said N subsequences xk(m) such that y(n) at least contains the same information as x(n) = xa(nT), i.e. xa(t) sampled with a sampling rate of 1/T, in a frequency region lower than w0, w0 being a predetermined limit frequency, by means of (i) upsampling each of said N subsequences xk(m), k = 0, 1, ..., N-1, by a factor M, M being a positive integer; (ii) filtering each of said upsampled N subsequences xk(m), k = 0, 1, ..., N-1, by a respective digital filter; and (iii) adding said N digitally filtered subsequences to form y(n). The respective digital filter is preferably a fractional delay filter and has preferably a frequency response Gk = ak e , k = 0, 1, ..., N-1, in the frequency band |wT| ≤ w0T, ak being a constant and s = d + tk, d being an integer.
摘要翻译：本发明涉及用于重建不均匀采样的带限模拟信号xa（t）的方法和装置，所述非均匀采样信号包括N个子序列x k（m），k = 0,1，...，N-1，N 根据xk（m）= xa（nMT + tk）以1 /（MT）的采样率进行采样获得，其中M是整数，tk = kMT / N +＆Dgr; tk，＆Dgr; tk 不同于零。本发明包括从所述N个子序列xk（m）形成新的序列y（n），使得y（n）至少包含与x（n）= xa（nT）相同的信息，即，x 通过（i）对所述N个子序列xk（m），k = 0,1，...，N中的每一个进行上采样，在低于w0的频率区域中的1 / T的采样率，w0是预定的限制频率 -1，乘以因子M，M是正整数; （ii）通过相应的数字滤波器滤波所述上采样的N个子序列x k（m），k = 0,1，...，N-1中的每一个; 和（iii）将所述N个经数字滤波的子序列相加以形成y（n）。相应的数字滤波器优选地是分数延迟滤波器，并且在频带| w T |中优选地具有频率响应G k = a k e <（ - jws T）>，k = 0,1，...，N-1。 ≤w0T，ak为常数，s = d + tk，d为整数。

76. 发明申请

WO02023731A2 METHODS AND SYSTEMS FOR DIGITAL DITHER 审中-公开
标题翻译：数字数字的方法和系统
公开(公告)号：WO02023731A2
公开(公告)日：2002-03-21
申请号：PCT/US2001/028327
申请日：2001-09-12
IPC分类号： H03M1/06 , H03M1/74 , H03M3/04 , H03M3/00
CPC分类号： H03M1/0641 , H03M1/74 , H03M3/332 , H03M3/424
摘要： Methods and systems for applying digital dither includes methods and systems for applying a digital dither in data converters, such as, for example, delta-sigma data converters. In an embodiment, an analog signal from a first path of a delta-sigma modulator is quantized to an m-bit digital signal and an n-bit dithered digital feedback signal is generated from at least a portion of the m-bit digital signal. The n-bit dithered digital feedback signal is converted to an analog feedback signal and fed back to a second path of the delta-sigma modulator. In an embodiment, the n-bit dithered digital feedback signal is generated by selecting one of a plurality of sets of n-bits from the m-bit digital signal depending upon a state of a dither control signal. The dither control signal can alternate between a plurality of states or pseudo-randomly switch between a plurality of states. In an embodiment, the m-bit digital signal is an m-bit thermometer code signal and the n-bit dithered digital feedback signal is generated by selecting between bits 0 through m-2 and bits 1 through m-1 of the m-bit digital signal. In an alternative embodiment, the m-bit digital signal is an m-bit thermometer code signal and the n-bit dithered digital feedback signal is generated by selecting between even and odd bits of the m-bit digital signal.
摘要翻译：用于应用数字抖动的方法和系统包括在数据转换器（例如，Δ-Σ数据转换器）中应用数字抖动的方法和系统。在一个实施例中，来自Δ-Σ调制器的第一路径的模拟信号被量化为m位数字信号，并且从m位数字信号的至少一部分产生n位抖动数字反馈信号。 n位抖动数字反馈信号被转换成模拟反馈信号并反馈到Δ-Σ调制器的第二路径。在一个实施例中，根据抖动控制信号的状态，通过从m位数字信号中选择多个n位组中的一个产生n位抖动数字反馈信号。抖动控制信号可以在多个状态之间交替，或者在多个状态之间进行伪随机切换。在一个实施例中，m位数字信号是m位温度计代码信号，并且n位抖动数字反馈信号是通过在位0至m-2和m位的位1至m-1之间进行选择而产生的数字信号。在替代实施例中，m位数字信号是m位温度计代码信号，并且通过在m位数字信号的偶数位和奇数位之间进行选择来产生n位抖动数字反馈信号。

77. 发明申请

WO02007319A1 A PRUNING CALIBRATION FLASH ANALOG-TO-DIGITAL CONVERTER (ADC) AND A METHOD OF CALIBRATING AND MANUFACTURING THE SAME 审中-公开
标题翻译：一种校正校准闪光模拟数字转换器（ADC）及其校准和制造方法
公开(公告)号：WO02007319A1
公开(公告)日：2002-01-24
申请号：PCT/US2001/022965
申请日：2001-07-19
IPC分类号： H03M1/06 , H03M1/10 , H03M1/36
CPC分类号： H03M1/0678 , H03M1/1033 , H03M1/36
摘要： A method to perform a pruning calibration of an analog-to-digital converter "ADC" commences with the selection (22) of the subset of comparators as operational. Unselected comparators within the ADC are powered down (24). The pool of comparators includes more comparators than are required to produce an N-bit output, i.e. the pool includes redundant comparators. The comparators of the ADC are not required to be accurate, and trip voltages of the pool are distributed over an input voltage range of the ADC.
摘要翻译：执行模数转换器“ADC”的修剪校准的方法从比较器子集的选择（22）开始运行。 ADC内的未选择的比较器掉电（24）。比较器池包括比产生N位输出所需要的更多的比较器，即池包括冗余比较器。 ADC的比较器不需要准确，池的跳闸电压分布在ADC的输入电压范围内。

78. 发明申请

WO0161862A3 DIGITAL/ANALOGUE CONVERTER WHICH MAY BE CALIBRATED 审中-公开
标题翻译：可校准的数字/模拟转换器
公开(公告)号：WO0161862A3
公开(公告)日：2001-12-20
申请号：PCT/EP0101712
申请日：2001-02-15
申请人： INFINEON TECHNOLOGIES AG , KUTTNER FRANZ
发明人： KUTTNER FRANZ
IPC分类号： H03M1/06 , H03M1/10 , H03M1/68 , H03M1/74
CPC分类号： H03M1/1061 , H03M1/687 , H03M1/745 , H03M1/747
摘要： The invention relates to a digital/analogue converter, comprising (a) a memory device (4), for the buffer storage of a digital value to be converted with n lower value binary data bits di(0 ; and (d) a calibrating circuit (30), for the calibration of both power source groups (12, 22) such that the sum of all the currents from the second power source group (22) is equal to that current value IQ, created by a power source (15a-15g) of the first power source group (12).
摘要翻译：校准的数字/模拟转换器包括：（a）存储器装置（4）用于锁存n的要被转换的数字值至少显著二进制数据位二（0

79. 发明申请

WO01091300A1 A SCRAMBLER AND A METHOD OF SCRAMBLING DATA WORDS 审中-公开
标题翻译：一种SCRAMBLER和一种数据文件的方法
公开(公告)号：WO01091300A1
公开(公告)日：2001-11-29
申请号：PCT/SE2001/001115
申请日：2001-05-18
IPC分类号： H03M1/06 , H03M1/08 , H03M7/16 , H03M7/26 , H03M1/66 , H03M1/76
CPC分类号： H03M7/165 , H03M1/0673 , H03M1/0863 , H03M7/26
摘要： To minimize the number of positions to be altered in a transition from one output data word to the next in a scrambler for scrambling successive, thermometer coded binary input data words comprising N bits into corresponding successive output data words also comprising N bits, the scrambler is adapted, if the number of bits of one binary value has increased from one input data work to the next, to maintain bits of said one binary value in positions in the corresponding output data word where the previous output data word had bits of said one binary value, and to randomize the remaining bits of said one binary value to positions in the corresponding output data word where the previous output data word had bits of the other binary value.
摘要翻译：为了最小化在扰频器中从一个输出数据字到下一个的转换中要改变的位置的数量，用于将包括N位的连续的温度计编码的二进制输入数据字加到也包括N位的相应的连续输出数据字中，加扰器是如果一个二进制值的位数从一个输入数据工作增加到下一个，则将所述一个二进制值的位保持在对应的输出数据字中的位置，其中先前的输出数据字具有所述一个二进制位的位并且将所述一个二进制值的剩余位随机化到相应输出数据字中的位置，其中先前输出数据字具有另一个二进制值的位。

80. 发明申请

WO01084717A1 A/D CONVERTER CALIBRATION 审中-公开
标题翻译： A / D转换器校准
公开(公告)号：WO01084717A1
公开(公告)日：2001-11-08
申请号：PCT/SE2001/000738
申请日：2001-04-04
IPC分类号： H03M1/44 , H03M1/10 , H03M1/16 , H03M1/06
CPC分类号： H03M1/1057 , H03M1/167
摘要： A method and apparatus for calibrating a pipeline stage in a multi-bit/stage pipeline A/D converter involves switching (S3, S4) a set of D/A converter unit-segments in the stage to predetermined states (+/-) for producing (S5) a first digital signal (d+), and switching (S6) a predetermined unit-segment in the set to its complementary state, keeping the states of the other unit-segments in said set unchanged, for producing (S7) a second digital signal (d-). The unit-segment is then associated (S8) with a calibration coefficient representing the deviation of the difference between the first and second digital signals from an expected difference between the first and second digital signals. This process is repeated for each unit-segment that is to be calibrated.
摘要翻译：用于校准多位/级流水线A / D转换器中的流水线级的方法和装置包括将该级中的一组D / A转换器单元段切换（S3，S4）到预定状态（+/-）以用于产生（S5）第一数字信号（d +），并将所述集合中的预定单位段切换（S6）为其互补状态，将所述设定中的其他单位段的状态保持不变，以产生（S7）a 第二数字信号（d-）。然后，将单位段与S8表示与表示第一和第二数字信号之间的差异与第一和第二数字信号之间预期差异的偏差的校准系数。对于要校准的每个单元段重复该过程。

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