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41. 发明申请

WO1998020616A1 A METHOD AND DEVICE TO PROVIDE A HIGH-PERFORMANCE DIGITAL-TO-ANALOG CONVERSION ARCHITECTURE 审中-公开
标题翻译：提供高性能数字到模拟转换架构的方法和设备
公开(公告)号：WO1998020616A1
公开(公告)日：1998-05-14
申请号：PCT/SE1997001672
申请日：1997-10-07
申请人： TELEFONAKTIEBOLAGET LM ERICSSON (publ)
发明人： TELEFONAKTIEBOLAGET LM ERICSSON (publ) , TAN, Nianxiong
IPC分类号： H03M01/68
CPC分类号： H03M1/0614 , H03M1/685 , H03M1/745 , H03M1/747
摘要： High-speed and high accuracy digital-to-analog (D/A) converters find many applications in signal processing. For wideband telecommunication systems, there is a strong demand on high-performance D/A converters. With the design of the present invention it is enabled to prevent distortions and intermodulations for high-speed and high-accuracy digital-to-analog (D/A) converters for telecommunication applications, where the requirements on distortion and intermodulation can be very stringent. By combining segmentation for MSBs and binary weighting for LSBs a high-performance digital-to-analog conversion architecture can be achieved, where a delay for the binary weighted LSBs is used to equalize a delay introduced by segmentation and where all bit switches (14) are clocked with a tree-like-clock distribution network (11). New floor plans for CMOS, BiCMOS and bipolar implementation are thus invented and circuits for CMOS bit switches and current sources are also disclosed.
摘要翻译：高速和高精度数模（D / A）转换器在信号处理中发现许多应用。对于宽带电信系统，对高性能D / A转换器的需求很强。通过本发明的设计，能够防止用于电信应用的高速和高精度数模（D / A）转换器的失真和互调，其中对失真和互调的要求可能非常严格。通过组合MSB的分段和LSB的二进制加权，可以实现高性能数模转换架构，其中二进制加权LSB的延迟用于均衡由分段引入的延迟，并且其中所有位开关（14）用树状时钟分配网络（11）计时。因此，发明了用于CMOS，BiCMOS和双极实现的新平面图，并且还公开了用于CMOS位开关和电流源的电路。

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