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41. 发明申请

WO2003092202A3 EXPLICIT CONGESTION NOTIFICATION FOR DOCSIS BASED BROADBAND COMMUNICATION SYSTEMS 审中-公开
公开(公告)号：WO2003092202A3
公开(公告)日：2003-11-06
申请号：PCT/US2003/012641
申请日：2003-04-23
申请人： BROADCOM CORPORATION
发明人： DALE, Mark , HARTMAN, David , LIN, Dorothy, D. , BRESCIA, Rocco, J., Jr. , GIN, Alan , BHASKARAN, Ravi, C. , CHIEN, Jen-chieh , FANOUS, Adel, F.
IPC分类号： H04B7/212
摘要： Satellite communications are carried out using the Data Over Cable Interface Specification (DOCSIS). Satellite modems are notified of upstream channel congestion by inserting a congestion notification message in a medium access protocol (MAP) message (300) for the upstream channel. Specifically, the congestion notification message is inserted in an unused field of the MAP message, such as the explicit congestion notification (ECN) field (302). The MAP message can also carry other characteristics of the upstream channel, including priority threshold, multicast access burst availability, and available bandwidth.

42. 发明申请

WO2003075454A3 OPERATIONAL AMPLIFIER WITH INCREASED COMMON MODE INPUT RANGE 审中-公开
公开(公告)号：WO2003075454A3
公开(公告)日：2003-09-12
申请号：PCT/US2003/005955
申请日：2003-02-27
申请人： BROADCOM CORPORATION
发明人： BLECKER, Eric, B. , RANGANATHAN, Sumant
IPC分类号： H03F3/45
摘要： An operational amplifier includes a first stage with a first differential transistor pair (M0, M1) inputting a differential input signal at their gates, a first tail current source transistor (M14) connected to sources of the first differential transistor pair (M0, M1), and a load transistor pair(M2, M3) connected in series with the drain of first differential transistor pair. An input stage includes a second differential transistor pair(M4, M5) connected to respective drains of the first differential transistor pair at their gates, and a second tail current transistor (M13) connected to sources of the differential transistor pair (M4, M5). An output stage (M10-M12) outputs a signal corresponding to the differential input signal.

43. 发明申请

WO2003073451A2 METHODS AND SYSTEMS FOR PROVIDING LOAD-ADAPTIVE OUTPUT CURRENT DRIVE 审中-公开
标题翻译：用于提供负载自适应输出电流驱动的方法和系统
公开(公告)号：WO2003073451A2
公开(公告)日：2003-09-04
申请号：PCT/US2003/004876
申请日：2003-02-21
申请人： BROADCOM CORPORATION
发明人： AJIT, Janardhanan, S.
IPC分类号： H01H
CPC分类号： H03K17/167 , H03K19/00361 , H03K19/018521
摘要： Methods and systems for sensing load conditions and for adjusting output current drive according to the sensed load conditions to maintain one or more signal characteristics within a desired range. Load conditions are sensed by monitoring one or more signal characteristics that are affected by load conditions, such as voltage changes with respect to time. Output current drive is then adjusted, as needed, to maintain the one or more desired signal characteristics. In an embodiment, rising and/or falling edge slopes are monitored. For example, a dV/dt may be monitored. The dV/dt can be monitored by coupling a capacitance to the output signal, generating a current with the capacitance, and generating a voltage from the current. The voltage is generally proportional to the dV/dt. Depending upon the load conditions, a supplemental current is generated and/or adjusted and added to the output signal to maintain the desired signal characteristics within a desired range. For example, where dV/dt is monitored, the supplemental current is generated and/or adjusted to maintain the dV/dt within a desired range. In this way, the desired signal characteristic(s) are substantially maintained within the desired range for a range of load values. One or more signal characteristics may be maintained over a load range of 50pF to 600pF. Signal characteristics may be sensed and maintained only during rising and falling edges. Signal characteristics may be separately sensed and maintained for rising and falling edges of data signals.
摘要翻译：用于感测负载状况并根据感测到的负载状况调整输出电流驱动以将一个或多个信号特性保持在期望范围内的方法和系统。通过监测受负载条件影响的一个或多个信号特性（例如电压随时间变化）来感测负载状况。然后根据需要调整输出电流驱动，以保持一个或多个期望的信号特性。在一个实施例中，监视上升和/或下降边缘斜率。例如，可以监测dV / dt。可以通过将电容耦合到输出信号来监测dV / dt，通过电容产生电流并从电流产生电压。电压一般与dV / dt成正比。取决于负载条件，产生和/或调整补充电流并将其添加到输出信号以将期望的信号特性维持在期望的范围内。例如，在监视dV / dt的情况下，生成和/或调整补充电流以将dV / dt保持在期望的范围内。以这种方式，对于一定范围的负载值，期望的信号特性基本上保持在期望的范围内。一个或多个信号特性可以在50pF至600pF的负载范围内保持。只有在上升沿和下降沿期间才能检测和维持信号特性。数据信号的上升沿和下降沿可以单独检测和维持信号特性。

44. 发明申请

WO2003063464A3 SYSTEM AND METHOD OF TRANSMISSION AND RECEPTION OF VIDEO USING COMPRESSED DIFFERENTIAL TIME STAMPS 审中-公开
公开(公告)号：WO2003063464A3
公开(公告)日：2003-07-31
申请号：PCT/US2003/001937
申请日：2003-01-22
申请人： BROADCOM CORPORATION
发明人： CHEN, Sherman, Xuemin , MACINNIS, Alexander, G.
IPC分类号： H04N7/62
摘要： Systems and methods that use differential values to represent decoding and presentation times (64) of pictures are provided. Optionally, some of the systems or the methods may use an entropy coding method (48) such as, for example, the Universal Variable Length Code (UVLC) for the differential time stamps.

45. 发明申请

WO2003049289A1 HOT CARRIER INJECTION SUPPRESSION CIRCUIT 审中-公开
标题翻译：热载体注射抑制电路
公开(公告)号：WO2003049289A1
公开(公告)日：2003-06-12
申请号：PCT/US2002/038489
申请日：2002-12-03
申请人： BROADCOM CORPORATION
发明人： AJIT, Janardhanan, S. , VASILIU, Laurentiu
IPC分类号： H03K3/00
CPC分类号： H03K17/0822 , H03K17/102 , H03K2217/0018
摘要： A method of preventing Hot Carrier Injection in input/output connections on low voltage integrated circuits. As integrated circuit voltages drop generally so does the external voltages that those circuits can tolerate. By placing input/output devices, in series, external voltages can be divided between the devices thereby reducing junction voltages seen by internal devices. A circuit for preventing Hot Carrier Injection in these input/output devices comprises comparing an input voltage (Vpad) to a reference voltage (Vddo), and if conditions that would produce Hot Carrier Injection are present (e.g. when input voltage is greater than reference voltage), slowing the turn-on of one of the series connected input/output devices (305, 307), thereby reducing the voltage from the drain-to-source of another series connected input/output device.
摘要翻译：一种在低电压集成电路上防止热载流子注入在输入/输出连接中的方法。由于集成电路电压通常下降到这些电路可以容忍的外部电压。通过串联放置输入/输出装置，可以在器件之间划分外部电压，从而减少内部器件所看到的结电压。用于在这些输入/输出设备中防止热载体注入的电路包括将输入电压（Vpad）与参考电压（Vddo）进行比较，并且如果存在将产生热载流子注入的条件（例如，当输入电压大于参考电压），减慢串联连接的输入/输出设备（305,307）中的一个的接通，从而降低另一串联连接的输入/输出设备的漏极到源的电压。

46. 发明申请

WO2003017555A2 IMPROVED BIT ERROR CONCEALMENT METHODS FOR SPEECH CODING 审中-公开
标题翻译：改进的字节编码错误隐藏方法
公开(公告)号：WO2003017555A2
公开(公告)日：2003-02-27
申请号：PCT/US2002/026254
申请日：2002-08-19
申请人： BROADCOM CORPORATION
发明人： CHEN, Juin-Hwey
IPC分类号： H04L
CPC分类号： G10L19/005 , H03M13/47
摘要： A system and method of concealing bit errors in a signal are provided. An exemplary method detects bit errors in an input signal having at least a current signal segment and a previous signal segment. The previous signal segment has a log-gain value qlg(m-1) and immediately precedes the current signal segment. The method comprises estimating a level lvl(m-1) of the input signal and determining a log-gain value qlg(m) of the current signal segment within the input signal. The method also comprises determining a difference between the gain value of the current signal segment and the previous signal segment and determining whether the difference exceeds a threshold wherein the threshold is adaptive to the input signal level.
摘要翻译：提供了一种隐藏信号中位错误的系统和方法。示例性方法检测具有至少当前信号段和先前信号段的输入信号中的位错误。先前的信号段具有对数增益值qlg（m-1），并且紧邻当前信号段。该方法包括估计输入信号的电平lv1（m-1），并确定输入信号内当前信号段的对数增益值qlg（m）。该方法还包括确定当前信号段的增益值与先前信号段之间的差值，并确定差值是否超过其中阈值适应于输入信号电平的阈值。

47. 发明申请

WO2003017545A1 SYSTEM, METHOD, AND COMPUTER PROGRAM PRODUCT FOR ETHERNET-PASSIVE OPTICAL NETWORKS 审中-公开
标题翻译：用于以太网被动光网络的系统，方法和计算机程序产品
公开(公告)号：WO2003017545A1
公开(公告)日：2003-02-27
申请号：PCT/US2002/026512
申请日：2002-08-21
申请人： BROADCOM CORPORATION
发明人： SALA, Dolors , GUMMALLA, Ajay, Chandra, V.
IPC分类号： H04J3/06
CPC分类号： H04L12/4035 , H04B10/272 , H04J3/0664 , H04J3/0682 , H04L12/40013 , H04L12/40026 , H04L12/4013 , H04L12/413 , H04Q11/0062 , H04Q11/0066 , H04Q11/0067 , H04Q2011/0064
摘要： A system, method, and computer program product for synchronizing time between a centralized controller device (105) and at least one subscriber device (120a-120n) on an Ethernet Passive Optical Network (EPON) (100). The MAC control layer (220) of an EPON (100) device is expanded, and additional messaging control is added via the transmission of Ethernet frames. Thus, bandwith is not wasted by simply transmitting a time stamp by itself.
摘要翻译：一种用于在以太网无源光网络（EPON）（100）上的集中式控制器设备（105）和至少一个用户设备（120a-120n）之间同步时间的系统，方法和计算机程序产品。 EPON（100）设备的MAC控制层（220）被扩展，并且经由以太网帧的传输来添加附加的消息收发控制。因此，通过简单地传送时间戳本身就不浪费带宽。

48. 发明申请

WO2003017475A1 METHOD AND SYSTEM FOR MULTIPLE TUNER APPLICATION USING A LOW NOISE BROADBAND DISTRIBUTION AMPLIFIER 审中-公开
标题翻译：使用低噪声宽带分配放大器的多路调谐器应用的方法和系统
公开(公告)号：WO2003017475A1
公开(公告)日：2003-02-27
申请号：PCT/US2002/025799
申请日：2002-08-15
申请人： BROADCOM CORPORATION
发明人： FANOUS, Adel , DAUPHINEE, Leonard , BURNS, Lawrence, M. , MCMULLIN, Donald
IPC分类号： H03F3/68
CPC分类号： H03G1/0029 , H03F3/45201 , H03F2200/294 , H03F2200/372 , H03F2203/45302 , H03F2203/45311 , H03F2203/45464 , H03F2203/45466 , H03F2203/45638 , H03F2203/45696 , H03G3/3036 , H03G3/3052
摘要： An active splitter circuit arrangement (300) includes a first amplification module (302) having a number of first input ports and first output ports. The first amplification module is configured to provide first stage amplification to a received input signal (RF input) and produce from the amplified input signal a number of output signals, each substantially matching the input signal.(RF input). Also included is a first gain control device (304) having a number of gain input ports respectively coupled to the first output ports and a gain output port coupled to at least one of the first input ports. The first gain control device is configured to control a gain of the first amplification module. Next, a number of second amplification modules (308, 310, 312) corresponding to the number of output signals has a number of second input ports respectively coupled to the first output ports. Each second amplification module (308, 310, 312) is configured to receive a control signal from the second gain control device.
摘要翻译：有源分离器电路装置（300）包括具有多个第一输入端口和第一输出端口的第一放大模块（302）。第一放大模块被配置为向接收的输入信号（RF输入）提供第一级放大，并且从放大的输入信号产生多个输出信号，每个输出信号基本上匹配输入信号（RF输入）。还包括具有分别耦合到第一输出端口的多个增益输入端口和耦合到第一输入端口中的至少一个的增益输出端口的第一增益控制装置（304）。第一增益控制装置被配置为控制第一放大模块的增益。接下来，对应于输出信号数量的多个第二放大模块（308,310,312）具有分别耦合到第一输出端口的多个第二输入端口。每个第二放大模块（308,310,312）被配置为从第二增益控制装置接收控制信号。

49. 发明申请

WO2003005156A3 SYSTEM, METHOD, AND COMPUTER PROGRAM PRODUCT FOR MANAGING COMMUNICATIONS IN ETHERNET-BASED FIBER OPTIC TDMA NETWORKS 审中-公开
公开(公告)号：WO2003005156A3
公开(公告)日：2003-01-16
申请号：PCT/US2002/021044
申请日：2002-07-05
申请人： BROADCOM CORPORATION
发明人： GUMMALLA, Ajay, Chandra, V. , SALA, Dolors , PANTELIAS, Niki, R.
IPC分类号： H04B10/00
摘要： A system, method, and computer program product for management of bandwidth, cost control, quality of service, and operational efficiency in a fiber optic, ethernet-based, TDMA communications system. A network topology is described in which an aggregating optical node (310) is used between a central office (305) and end users (330). This allows a variety of topologies between the optical node and end users. Methods of spectral allocation are also described, allowing for improved service and efficient management of bandwidth. Bandwidth can also be managed in the time domain, through a system of bandwidth requests and grants, and through flexible handling of packets, e.g., fragmentation, prioritization, and the use of judiciously sized maximum data units. The invention also features mechanisms by which video service is enhanced for end users. These mechanisms include buffering of video frames, allowing channel switching at the optical node, flexible allocation of bandwidth between video and non-video requirements.

50. 发明申请

WO2002102047A2 INTEGRATED UPSTREAM AMPLIFIER FOR CABLE MODEMS AND CABLE SET-TOP BOXES 审中-公开
标题翻译：用于电缆模式和电缆机顶盒的集成式UPSTREAM放大器
公开(公告)号：WO2002102047A2
公开(公告)日：2002-12-19
申请号：PCT/US2002/018015
申请日：2002-06-07
申请人： BROADCOM CORPORATION , JANTZI, Stephen, A. , TAMMINEEDI, Anilkumar, V. , SONG, Jungwoo , BURNS, Lawrence, M. , MCMULLIN, Donald, G. , WOO, Agnes, N.
发明人： JANTZI, Stephen, A. , TAMMINEEDI, Anilkumar, V. , SONG, Jungwoo , BURNS, Lawrence, M. , MCMULLIN, Donald, G. , WOO, Agnes, N.
IPC分类号： H04N
CPC分类号： H03G3/001 , H03G1/0088
摘要： An upstream amplifier is integrated on a substrate with a digital-to-analog converter (DAC) to form integrated circuit. In an embodiment, a low-pass filter is also integrated on the substrate. The output signal level of the upstream amplifier is controllable. In embodiments, fine adjustments are made to the output signal level of the upstream amplifier by varying a bias current of the DAC. A software control bit is used to switch between a power-on mode of operation and a power-down mode of operation. The upstream amplifier transmits in a burst mode. The power consumption of the upstream amplifier scales with the amplifier's output signal level. A high degree of matching is attained between the positive and negative paths of the upstream amplifier. This provides high immunity from common-mode disturbances such as substrate noise, clock spurs, and glitches caused by a gain change.
摘要翻译：上游放大器（107）与数模转换器（DAC）（102）集成在基板（142）上以形成集成电路。在一个实施例中，低通滤波器（104）也集成在基板（142）上。上游放大器（107）的输出信号电平是可控的。在实施例中，通过改变DAC（102）的偏置电流来对上游放大器（107）的输出信号电平进行微调。软件控制位用于在上电操作模式和掉电操作模式之间切换。上游放大器（107）以突发模式发送。上游放大器（107）的功耗随放大器的输出信号电平而变化。在上游放大器（107）的正和负路径之间获得高度匹配。这提供了诸如衬底噪声，时钟刺激和由增益变化引起的毛刺等共模干扰的高抗扰性。

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