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41. 发明申请

WO2019183029A1 SYSTEM AND METHOD FOR TUNING THICKNESS OF RESIST FILMS 审中-公开
公开(公告)号：WO2019183029A1
公开(公告)日：2019-09-26
申请号：PCT/US2019/022870
申请日：2019-03-19
申请人： TOKYO ELECTRON LIMITED , TOKYO ELECTRON U.S. HOLDINGS, INC.
发明人： DEVILLIERS, Anton , SMITH, Jeffrey , FULFORD, Daniel
IPC分类号： H01L21/027 , H01L21/66 , H01L21/02 , G03F7/00
摘要： Techniques herein include methods of tuning film thickness of a dispensed resist or solvent. Techniques herein include controlling a final thickness of a resist film by manipulating substrate spin speed, viscosity of photoresist, amount of solids within a photoresist, and solvent evaporation rates in real time from a dispense module. This includes mixing a higher-concentration photoresist with a dilution fluid proximate to a dispense nozzle just before deposition on a substrate. An amount of dilution fluid added can be calculated to result in a photoresist concentration or viscosity to result in a film of a desired thickness.

42. 发明申请

WO2019183023A1 SUBSTRATE HOLDING APPARATUS AND METHOD FOR SHAPE METROLOGY 审中-公开
公开(公告)号：WO2019183023A1
公开(公告)日：2019-09-26
申请号：PCT/US2019/022859
申请日：2019-03-19
申请人： TOKYO ELECTRON LIMITED , TOKYO ELECTRON U.S. HOLDINGS, INC.
发明人： KANG, Hoyoung , DEVILLIERS, Anton
IPC分类号： H01L21/687 , H01L21/683 , H01L21/67 , H01L21/02
摘要： An apparatus and method for uniformly holding a substrate without flexure or bending of the substrate, thereby enabling accurate shape measurements of the substrate such as wafer curvature, z-height values and other surface characteristics. Techniques include using a liquid as a supporting surface for a substrate thereby providing uniform support. Liquid used has a same specific gravity of a substrate being supported so that the substrate can float on the liquid without sinking. Uniform support of the substrate enables precision metrology.

43. 发明申请

WO2019140423A1 SYSTEM AND METHOD FOR FLUID DISPENSE AND COVERAGE CONTROL 审中-公开
公开(公告)号：WO2019140423A1
公开(公告)日：2019-07-18
申请号：PCT/US2019/013588
申请日：2019-01-15
申请人： TOKYO ELECTRON LIMITED , TOKYO ELECTRON U.S. HOLDINGS, INC.
发明人： DEVILLIERS, Anton
IPC分类号： H01L21/67 , H01L21/02 , H01L21/027 , H01L21/66
摘要： Techniques herein include systems and methods for dispensing liquids on a substrate with real-time coverage control and removal control. Techniques also encompass quality control of dispense systems. Systems and methods enable visual examination of liquids progressing on a surface of a substrate. This includes capturing and/or examining stroboscopic images of movement of a given liquid on a working surface of a substrate, and then generating feedback data for modifying a corresponding dispense. Dispenses can be modified by increasing/decreasing a dispense rate and increasing/decreasing a rotational velocity of a substrate. Feedback can be generated by automated and/or manual analysis of real time progression as well as post-process analysis of collections of images.

44. 发明申请

WO2015021297A1 SUBSTRATE BACKSIDE TEXTURING 审中-公开
标题翻译：基板背面纹理
公开(公告)号：WO2015021297A1
公开(公告)日：2015-02-12
申请号：PCT/US2014/050177
申请日：2014-08-07
申请人： TOKYO ELECTRON LIMITED , TOKYO ELECTRON U.S. HOLDINGS, INC.
发明人： HULI, Lior , SMITH, Jeffrey, T. , FONSECA, Carlos, A. , DEVILLIERS, Anton , RATHSACK, Benjamen, M.
IPC分类号： H01L21/683
CPC分类号： H01L21/02016 , G03F7/70783 , H01L21/30625 , H01L21/687 , H01L22/12 , H01L22/20
摘要： Embodiments described relate to a method and apparatus for reducing lithographic distortion. A backside of a semiconductor substrate may be texturized. Then a lithographic process may be performed on the semiconductor substrate having the texturized backside. To improve distortion uniformity and, perhaps, improve overlay performance, the backside surface of semiconductor substrate which contacts chuck pins may be texturized to produce a more uniform wafer distortion due to wafer slippage on the chuck. The backside of semiconductor substrate is texturized to produce a smaller coefficient of friction which improves the slippage uniformity across the backside of the semiconductor substrate during scanner chucking.
摘要翻译：所描述的实施例涉及一种减小光刻畸变的方法和装置。半导体衬底的背面可以被组织化。然后可以在具有纹理化背面的半导体衬底上进行光刻工艺。为了改善失真均匀性，并且可能提高覆盖性能，接触卡盘销的半导体基板的背面可以被组织化以由于卡盘上的晶片滑动而产生更均匀的晶片变形。半导体衬底的背面被纹理化以产生较小的摩擦系数，这改善了扫描器卡盘期间半导体衬底背面的滑动均匀性。

45. 发明申请

WO2018090001A1 METHOD OF FORMING GATE SPACER FOR NANOWIRE FET DEVICE 审中-公开
标题翻译：形成用于纳米级FET器件的栅极间隔物的方法
公开(公告)号：WO2018090001A1
公开(公告)日：2018-05-17
申请号：PCT/US2017/061539
申请日：2017-11-14
申请人： TOKYO ELECTRON LIMITED , SMITH, Jeffrey , DEVILLIERS, Anton
发明人： SMITH, Jeffrey , DEVILLIERS, Anton
IPC分类号： H01L29/423 , H01L29/66 , H01L29/06 , H01L29/78
摘要： A method of forming a gate-all-around semiconductor device, includes providing a substrate having a layered fin structure thereon. The layered fin structure includes a channel portion and a sacrificial portion each extending along a length of the layered fin structure, wherein the layered fin structure being covered with replacement gate material. A dummy gate is formed on the replacement gate material over the layered fin structure, wherein the dummy gate having a critical dimension which extends along the length of the layered fin structure. The method further includes forming a gate structure directly under the dummy gate, the gate structure including a metal gate region and gate spacers provided on opposing sides of the metal gate region, wherein a total critical dimension of the gate structure is equal to the critical dimension of the dummy gate.
摘要翻译：形成环栅半导体器件的方法包括提供其上具有分层鳍结构的衬底。分层鳍片结构包括沟道部分和牺牲部分，每个沟道部分和牺牲部分均沿着分层鳍片结构的长度延伸，其中分层鳍片结构被替换栅极材料覆盖。伪栅极形成在分层鳍状物结构上方的替代栅极材料上，其中伪栅极具有沿着分层鳍状物结构的长度延伸的临界尺寸。该方法还包括在伪栅极正下方形成栅极结构，栅极结构包括金属栅极区域和设置在金属栅极区域的相对侧上的栅极间隔物，其中栅极结构的总临界尺寸等于临界尺寸的假门。

46. 发明申请

WO2018090007A1 METHOD OF PREVENTING BULK SILICON CHARGE TRANSFER FOR NANOWIRE AND NANOSLAB PROCESSING 审中-公开
标题翻译：防止纳米线大规模硅电荷转移的方法和纳米加工工艺
公开(公告)号：WO2018090007A1
公开(公告)日：2018-05-17
申请号：PCT/US2017/061550
申请日：2017-11-14
申请人： TOKYO ELECTRON LIMITED , SMITH, Jeffrey , DEVILLIERS, Anton
发明人： SMITH, Jeffrey , DEVILLIERS, Anton
IPC分类号： H01L29/66 , H01L29/78 , H01L29/06
摘要： A method of fabricating a semiconductor device includes providing a substrate having a layered fin structure thereon. The layered fin structure includes base fin portion, a sacrificial portion provided on the base fin portion and a channel portion provided on the sacrificial portion. A doping source film is provided on the substrate over the layered fin structure, and diffusing doping materials from the doping source film into a portion of the layered fin structure other than the channel portion to form a diffusion doped region in the layered fin structure. An isolation material is provided on the substrate over at least the diffusion doped region of the layered fin structure.
摘要翻译：制造半导体器件的方法包括提供其上具有分层鳍结构的衬底。分层鳍片结构包括基部鳍片部分，设置在基部鳍片部分上的牺牲部分和设置在牺牲部分上的沟道部分。在分层鳍片结构上的衬底上提供掺杂源极膜，并且将掺杂源材料从掺杂源膜扩散到除了沟道部分之外的分层鳍片结构的一部分中，以在分层鳍片结构中形成扩散掺杂区域。至少在分层鳍状结构的扩散掺杂区域上在衬底上提供隔离材料。

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