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31. 发明申请

WO2006099526A3 FAST FOURIER TRANSFORM TWIDDLE MULTIPLICATION 审中-公开
标题翻译：快速傅立叶变换双向多路复用
公开(公告)号：WO2006099526A3
公开(公告)日：2008-04-10
申请号：PCT/US2006009469
申请日：2006-03-13
申请人： QUALCOMM INC , COUSINEAU KENVIN S , KRISHNAMOORTHI RAGHURAMAN
发明人： COUSINEAU KENVIN S , KRISHNAMOORTHI RAGHURAMAN
IPC分类号： G06F17/14 , H04L27/26
CPC分类号： H04L5/0064 , G06F17/142 , H04L5/0007 , H04L5/0048 , H04L5/0083 , H04L25/022 , H04L25/0226 , H04L27/265 , H04L27/2656
摘要： An FFT engine implementing a cycle count method of applying twiddle multiplications in multi-stages. When implementing a multistage FFT, the intermediate values need to be multiplied by various twiddle factors. The FFT engine utilizes a minimal number of multipliers to perform the twiddle multiplications in an efficient pipeline. Optimizing a number of complex multipliers based on an FFT radix and a number of values in each row of memory allows the FFT function to be performed using a reasonable amount of area and in a minimal number of cycles. Strategic ordering and grouping of the values allows the FFT operation to be performed in a fewer number of cycles.
摘要翻译：实现循环计数法的FFT引擎，用于多阶段应用旋转乘法。当实现多级FFT时，中间值需要乘以各种旋转因子。 FFT引擎利用最少数量的乘法器在有效的管道中执行旋转乘法。基于每一行存储器中的FFT基数和多个值来优化多个复数乘法器允许使用合理的面积和最小数量的周期来执行FFT功能。这些值的策略排序和分组允许以更少的周期执行FFT运算。

32. 发明申请

WO2005079033A3 SUBBAND-BASED DEMODULATION USING REDUCED FOURIER TRANSFORM FOR AN OFDM-BASED COMMUNICATION SYSTEM 审中-公开
标题翻译：基于OFDM的通信系统使用减少傅里叶变换的基于子带的解调
公开(公告)号：WO2005079033A3
公开(公告)日：2005-12-08
申请号：PCT/US2005003581
申请日：2005-02-04
申请人： QUALCOMM INC , KRISHNAMOORTHI RAGHURAMAN
发明人： KRISHNAMOORTHI RAGHURAMAN
IPC分类号： G06F17/14 , H04L25/02 , H04L27/26
CPC分类号： G06F17/142 , H04L25/0204 , H04L25/0226 , H04L27/2633 , H04L27/265
摘要： For subband-based OFDM demodulation, a "partial" Fourier transform is performed on a sequence of N input samples for an OFDM symbol to obtain Nc received symbols for a group of Nc data subbands, where Nc ⋅ L = N and L > 1 . For the partial Fourier transform, the N input samples are rotated with a phasor to obtain N rotated input samples, which are accumulated (for each set of L samples) to obtain Nc time-domain values. An Nc-point FFT is performed on the Nc time-domain values to obtain the Nc received symbols. Channel gain estimates for the data subbands are also obtained, for example, by performing a partial Fourier transform to obtain received pilot symbols, an inverse FFT to obtain time-domain channel gain values, and an FFT to obtain channel gain estimates for the data subbands. The received symbols are processed with (e.g., equalized by) the channel gain estimates to obtain recovered data symbols.
摘要翻译：对于基于子带的OFDM解调，对OFDM符号的N个输入样本的序列执行“部分”傅立叶变换，以获得Nc个数据子带的组Nc个接收符号，其中Nc·L = N和L> 1。对于部分傅里叶变换，N个输入样本用相量旋转以获得N个旋转的输入样本，其被累积（对于每组L个样本）以获得Nc个时域值。对Nc时域值执行Nc点FFT以获得Nc个接收符号。也可以例如通过执行部分傅立叶变换来获得接收到的导频符号，获得时域信道增益值的逆FFT和获得数据子带的信道增益估计的FFT来获得数据子带的信道增益估计。接收到的符号用信道增益估计进行（例如，均衡）处理以获得恢复的数据符号。

33. 发明申请

WO2009015399A3 SYSTEMS AND METHODS FOR GENERALIZED SLOT-TO-INTERLACE MAPPING 审中-公开
标题翻译：用于广义槽到交织映射的系统和方法
公开(公告)号：WO2009015399A3
公开(公告)日：2009-07-02
申请号：PCT/US2008072372
申请日：2008-08-06
申请人： QUALCOMM INC , MUKKAVILLI KRISHNA KIRAN , KRISHNAMOORTHI RAGHURAMAN , VIJAYAN RAJIV
发明人： MUKKAVILLI KRISHNA KIRAN , KRISHNAMOORTHI RAGHURAMAN , VIJAYAN RAJIV
IPC分类号： H04L27/26 , H04L5/00 , H04L5/02 , H04W72/12
CPC分类号： H04L5/0048 , H04L5/0007 , H04L5/0044 , H04L5/0064 , H04L5/0083 , H04L25/0226
摘要： A transmitter or receiver device includes a processing system configured to have one or more pilot interlace vectors and one or more distance vectors. The processing system is further configured to generate a first slot interlace for a first slot based on the one or more pilot interlace vectors, and is further configured to generate a second slot interlace for a second slot based on the first slot interlace and the one or more distance vectors. Additional slot interlaces for all other slots may also be generated based on the first slot interlace and the one or more distance vectors.
摘要翻译：发射机或接收机设备包括配置成具有一个或多个导频交织矢量和一个或多个距离矢量的处理系统。所述处理系统进一步经配置以基于所述一个或一个以上导频交错向量产生用于第一时隙的第一时隙交错，且进一步经配置以基于所述第一时隙交错及所述一者或两者而产生用于第二时隙的第二时隙交错，或者更多的距离矢量。所有其他时隙的附加时隙交织也可基于第一时隙交织和一个或多个距离矢量来生成。

34. 发明申请

WO2007111742A3 APPARATUS AND METHODS FOR DETERMINING TIMING IN A COMMUNICATION SYSTEM 审中-公开
标题翻译：用于确定通信系统中的时序的装置和方法
公开(公告)号：WO2007111742A3
公开(公告)日：2008-01-24
申请号：PCT/US2006062195
申请日：2006-12-15
申请人： QUALCOMM INC , MUKKAVILLI KRISHNA KIRAN , WANG MICHAEL MAO , KRISHNAMOORTHI RAGHURAMAN
发明人： MUKKAVILLI KRISHNA KIRAN , WANG MICHAEL MAO , KRISHNAMOORTHI RAGHURAMAN
IPC分类号： H04L25/02 , H04L27/26
CPC分类号： H04L27/2662 , H04L25/0202 , H04L27/2686
摘要： Apparatus and methods for use in a wireless communication system are disclosed for determining a timing position for channel activity in order to resolve timing ambiguity. A disclosed apparatus includes a processor that determines when channel activity occurs in at least one of an early or a late arrival position in a communication channel estimate and unwraps the channel activity in either the early arrival position or the late arrival position to a corresponding late or early arrival unwrapped channel activity position in the wireless channel estimate. The processor correlates symbol data in the communication signal corresponding to both the channel activity and the unwrapped channel activity to symbol data of the main channel activity. The processor determines whether a correct timing position of the channel activity is one of the early or late arrival positions based on the correlations, thus resolving timing ambiguity. Complementary methods are also disclosed.
摘要翻译：公开了用于无线通信系统中的装置和方法，用于确定信道活动的定时位置，以便解决定时模糊。所公开的装置包括处理器，其确定在通信信道估计中的早期或迟到到达位置中的至少一个中何时发生信道活动，并且将早期到达位置或延迟到达位置中的信道活动解包到相应的延迟或在无线信道估计中提前到达解开的频道活动位置。处理器将对应于信道活动和解开的信道活动的通信信号中的符号数据与主信道活动的符号数据相关联。处理器基于相关性确定信道活动的正确定时位置是早期还是迟到位置之一，从而解决定时模糊度。还公开了互补方法。

35. 发明申请

WO2007140344A3 WIRELESS ARCHITECTURE FOR A TRADITIONAL WIRE-BASED PROTOCOL 审中-公开
标题翻译：传统的基于线程的协议的无线架构
公开(公告)号：WO2007140344A3
公开(公告)日：2008-03-27
申请号：PCT/US2007069815
申请日：2007-05-25
申请人： QUALCOMM INC , KRISHNAMOORTHI RAGHURAMAN , DHARMARAJU DINESH , LEUNG LAUREN
发明人： KRISHNAMOORTHI RAGHURAMAN , DHARMARAJU DINESH , LEUNG LAUREN
IPC分类号： G06F3/14 , H04L12/28 , H04L12/56
CPC分类号： H04W28/22
摘要： Embodiments are described in connection with transferring data traditionally communicated through a wired link over a high-speed wireless link. The disclosed embodiments provide the wired and/or wireless data communication with minimal changes on the existing wired architecture. According to an embodiment is an apparatus for communicating wirelessly over a traditional wired link. The apparatus includes a transmitter comprising a host and a first portion of a client connected by a wired link and a receiver comprising a second portion of the client. According to some embodiments, the apparatus can include a query module that determines an operation rate based in part on a rate supported by a medium access control and a retransmission statistic and an assigner module that assigns a communication to a wired protocol or a wireless protocol.
摘要翻译：结合传输通过高速无线链路通过有线链路传输的数据来描述实施例。所公开的实施例在现有的有线体系结构上以最小的改变提供有线和/或无线数据通信。根据一个实施例是一种用于通过传统有线链路无线通信的装置。该装置包括发射机，该发射机包括通过有线链路连接的主机和客户机的第一部分以及包括客户机的第二部分的接收机。根据一些实施例，该装置可以包括查询模块，该查询模块部分地基于由媒体访问控制和重传统计信息支持的速率以及将通信分配给有线协议或无线协议的分配器模块来确定操作速率。

36. 发明申请

WO2007118104A3 CLI PPING FOR CONTROL OF PEAK TO AVERAGE POWER RATIO 审中-公开
标题翻译：用于控制峰值以平均功率比的命令
公开(公告)号：WO2007118104A3
公开(公告)日：2007-11-29
申请号：PCT/US2007065902
申请日：2007-04-03
申请人： QUALCOMM INC , SUN THOMAS , KRISHNAMOORTHI RAGHURAMAN
发明人： SUN THOMAS , KRISHNAMOORTHI RAGHURAMAN
IPC分类号： H04L27/26
CPC分类号： H04L27/2623
摘要： The claimed subject matter relates to enforcing a threshold peak to average power while reducing affects associated with saturation. This can be accomplished, for instance, by accessing a piecewise linear approximation of an ideal clipping region, wherein the ideal clipping region is based at least in part upon the threshold peak to average power ratio. Thereafter, a signal is clipped if power associated with the signal lies outside a region encompassed by the piecewise linear approximation.
摘要翻译：所要求保护的主题涉及在减小与饱和度相关的影响的同时执行阈值峰值以达到平均功率。这可以通过例如通过访问理想削波区域的分段线性近似来实现，其中理想限幅区域至少部分地基于阈值峰均功率比。此后，如果与信号相关联的功率位于由分段线性近似包围的区域的外部，则剪辑信号。

37. 发明申请

WO2007115329A2 PIPELINE FFT ARCHITECTURE AND METHOD 审中-公开
标题翻译：管道FFT架构和方法
公开(公告)号：WO2007115329A2
公开(公告)日：2007-10-11
申请号：PCT/US2007066002
申请日：2007-04-04
申请人： QUALCOMM INC , COUSINEAU KEVIN S , KRISHNAMOORTHI RAGHURAMAN
发明人： COUSINEAU KEVIN S , KRISHNAMOORTHI RAGHURAMAN
IPC分类号： G06F17/14
CPC分类号： G06F17/142 , H04L25/0228 , H04L27/263 , H04L27/265 , H04L27/2656
摘要： Techniques for performing Fast Fourier Transforms (FFT) are described. In some aspects, calculating the Fast Fourier Transform is achieved with an apparatus having a memory (610), a Fast Fourier Transform engine (FFTe) having one or more registers (650) and a delayless pipeline (630), the FFTe configured to receive a multi-point input from the main memory (610), store the received input in at least one of the one or more registers (650), and compute either or both of a Fast Fourier Transform (FFT) and an Inverse Fast Fourier Transform (IFFT) on the input using the delayless pipeline.
摘要翻译：描述用于执行快速傅里叶变换（FFT）的技术。在一些方面，使用具有存储器（610），具有一个或多个寄存器（650）和无延迟流水线（630）的快速傅里叶变换引擎（FFTe）的装置来实现快速傅里叶变换的计算，FFTe被配置为接收来自主存储器（610）的多点输入将所接收的输入存储在一个或多个寄存器（650）中的至少一个寄存器（650）中，并且计算快速傅里叶变换（FFT）和快速傅立叶逆变换（IFFT）使用无延迟管道输入。

38. 发明申请

WO2005057423A3 FFT ARCHITECTURE AND METHOD 审中-公开
标题翻译： FFT架构和方法
公开(公告)号：WO2005057423A3
公开(公告)日：2006-06-01
申请号：PCT/US2004040498
申请日：2004-12-03
申请人： QUALCOMM INC , KRISHNAMOORTHI RAGHURAMAN , GANAPATHY CHINNAPPA K
发明人： KRISHNAMOORTHI RAGHURAMAN , GANAPATHY CHINNAPPA K
IPC分类号： G06F17/14 , G06F15/00 , H04L27/26
CPC分类号： G06F17/142 , H04L27/265
摘要： A Fast Fourier Transform (FFT) hardware implementation and method provides efficient FFT processing while minimizing the die area needed in an Integrated Circuit (IC). The FFT hardware can implement an N point FFT, where N = rn is a function of a radix (r). The hardware implementation includes a sample memory having N/r rows, each storing r samples. A twiddle factor memory can store k twiddle factors per row, where 0
摘要翻译：快速傅里叶变换（FFT）硬件实现和方法提供了有效的FFT处理，同时最小化集成电路（IC）所需的管芯面积。 FFT硬件可以实现N点FFT，其中N = rn是基数（r）的函数。硬件实现包括具有N / r行的采样存储器，每个存储r个样本。旋转因子存储器可以存储每行的k个旋转因子，其中0

39. 发明申请

WO2016099978A3 COMMON REFERENCE SIGNAL DESIGN BASED ON SEMI-UNIFORM PILOT SPACING AND ORTHOGONAL COVER CODE 审中-公开
标题翻译：基于半均匀间距和正交覆盖码的通用参考信号设计
公开(公告)号：WO2016099978A3
公开(公告)日：2016-11-17
申请号：PCT/US2015064261
申请日：2015-12-07
申请人： QUALCOMM INC
发明人： JIANG JING , SORIAGA JOSEPH BINAMIRA , MUKKAVILLI KRISHNA KIRAN , JI TINGFANG , XU HUILIN , BHUSHAN NAGA , KRISHNAMOORTHI RAGHURAMAN , ANG PETER PUI LOK , SMEE JOHN EDWARD
IPC分类号： H04L27/26 , H04L5/00
CPC分类号： H04L5/0048 , H04L5/0026 , H04L5/005 , H04L25/0202 , H04L27/2613 , H04L47/12 , H04W72/0446 , H04W72/0453 , H04W72/0466
摘要： Systems and techniques are disclosed to reduce pilot overhead by providing common reference signals coded with cover codes that are orthogonal in time and frequency domains. Common reference signals that are coded by cover codes orthogonal in both domains can be de-spread in both the time and frequency domains for improved resolution and larger pull-in windows. Semi-uniform pilot spacing in both the frequency and time domains can be utilized. In time domain, a first pilot symbol pair is spaced by a first time interval and a second pilot symbol pair is spaced by a second time interval from the first pair, the second interval being greater than the first. In frequency domain, a first set of pilot symbols is densely placed in a selected frequency band and a second set of pilot symbols is sparsely placed surrounding and including the selected frequency band.
摘要翻译：公开了系统和技术以通过提供用在时域和频域上正交的覆盖码编码的公共参考信号来减少导频开销。通过在两个域中正交的覆盖码编码的公共参考信号可以在时域和频域两者中解扩以提高分辨率和更大的拉入窗口。可以使用频率和时间域中的半统一导频间隔。在时域中，第一导频符号对间隔第一时间间隔并且第二导频符号对与第一对间隔第二时间间隔，第二间隔大于第一时间间隔。在频域中，第一组导频符号密集地放置在选择的频带中，并且第二组导频符号稀疏地放置在所选频带周围并且包括所选频带。

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