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    • 27. 发明申请
    • APPARATUS AND METHODS FOR PERFORMING ELECTROFUSION
    • 用于执行电气的装置和方法
    • WO1990007954A1
    • 1990-07-26
    • PCT/US1989001773
    • 1989-04-27
    • UNIVERSITY OF SOUTH FLORIDA
    • UNIVERSITY OF SOUTH FLORIDAGRASSO, Robert, J.
    • A61N01/32
    • A61F9/013A61F9/007C12M35/02
    • Electrofusion of biological particles to specific areas of tissue is accomplished in vivo through the use of electrode members (12, 14) that conform to the configuration and dimension of the tissue (11) at the electrofusion site. The electrode members are positioned in close physical proximity to one another so that when an electrical potential difference is established between them, current flow is limited to the area of tissue between the electrodes so that tissue remote from the selected electrofusion site is substantially unaffected by such current flow. A general apparatus and method is supplemented with two illustrative apparatus and methods for accomplishing in vivo electrofusion on corneas and in cervical areas.
    • 通过使用符合电熔融部位处的组织(11)的构型和尺寸的电极构件(12,14),在体内实现生物颗粒到组织的特定区域的电融合。 电极构件彼此紧密地物理接近,使得当它们之间建立电位差时,电流被限制在电极之间的组织区域,使得远离所选择的电融合部位的组织基本上不受这样的影响 当前流。 一般的装置和方法补充有用于在角膜和宫颈区域中实现体内电融合的两个说明性装置和方法。
    • 29. 发明申请
    • METHOD AND APPARATUS FOR USE IN IDDQ INTEGRATED CIRCUIT TESTING
    • 用于IDDQ集成电路测试的方法和装置
    • WO1997018481A1
    • 1997-05-22
    • PCT/US1996018426
    • 1996-11-15
    • UNIVERSITY OF SOUTH FLORIDAATHAN, Stephan, P.
    • UNIVERSITY OF SOUTH FLORIDA
    • G01R31/28
    • G01R31/3008G01R31/3004G01R31/3012
    • A built-in current sensor circuit (BICS) for use in integrated circuit testing utilizing the quiescent power supply testing technique includes a detecting transistor (m10), an s-RAM (m5-m8, m3 and m9) cell and a buffer cell (m11-m14) electrically coupled in a cascaded configuration to perform a comparator function, a reference source (34) comprised of a current generating transistor (m1) and a voltage level setting transistor (m2), and an active output load (38) comprised of a single P-MOSFET (m12) sized to draw a unique amount of current when a respective circuit under test (CUT) is determined to be defective. Whereby the additional current drawn by the active output load (38) is readily observable on the bias line by an external standard off the shelf current monitor. The built-in current sensor circuit (BICS) thereby alleviating the excessive use of area overhead in deep submicron integrated circuits and the need for separately propagating a defect signal to an output pin.
    • 使用静态电源测试技术的集成电路测试中使用的内置电流传感器电路(BICS)包括检测晶体管(m10),s-RAM(m5-m8,m3和m9)单元和缓冲单元 电流耦合在级联配置中以执行比较器功能,包括电流产生晶体管(m1)和电压电平设置晶体管(m2)的参考源(34)和有源输出负载(38),其包括 的单个P-MOSFET(m12),其尺寸被设计成当相应的被测电路(CUT)被确定为有缺陷时绘制唯一量的电流。 由此,有源输出负载(38)所引起的附加电流可以通过外部标准在电流监视器上在偏置线上容易地观察到。 内置的电流传感器电路(BICS)从而减轻了深亚微米集成电路中过度使用区域开销,以及需要将缺陷信号单独传播到输出引脚。