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    • 1. 发明申请
    • ANALOG LOAD DRIVER
    • 模拟负载驱动器
    • WO2004030214A1
    • 2004-04-08
    • PCT/US2003/018793
    • 2003-06-13
    • RAYTHEON COMPANY
    • WYLES, Richard, H.VAMPOLA, John, L.
    • H03K19/017
    • H03F3/3037H03F2200/375H03F2200/471
    • An electronic circuit device (12) for driving a load comprises a load terminal, a control terminal and a power terminal for connection to a source of electric power. The circuit device, and a connects to a power supply return terminal by means of three electric elements connected in parallel, namely, the capacitance of a load (22), a bias current supply (14), and a current bypass (16). A voltage sensor (18) is connected between the control terminal and the load terminal for sensing a voltage drop developed between the control terminal and the load terminal. The voltage sensor it is operative to activate the bypass to conduct current in parallel with current flow of the current source in the situation wherein the voltage drop exceeds a threshold. Thereby, the circuit device drives the load in one direction, and the current source and the bypass drive the load in the opposite direction.
    • 用于驱动负载的电子电路装置(12)包括负载端子,控制端子和用于连接到电力源的电源端子。 电路装置,并且通过并联连接的三个电气元件,即负载(22),偏置电流源(14)和电流旁路(16)的电容连接到电源返回端子。 电压传感器(18)连接在控制端子和负载端子之间,用于感测在控制端子和负载端子之间产生的电压降。 在电压降超过阈值的情况下,电压传感器用于激活旁路以与电流源的电流并行地导通电流。 因此,电路装置沿一个方向驱动负载,电流源和旁路以相反的方向驱动负载。
    • 3. 发明申请
    • ELECTRONIC OUTPUT MODULE
    • 电子输出STAGE
    • WO01073943A1
    • 2001-10-04
    • PCT/DE2001/001234
    • 2001-03-28
    • H03F3/30H03F3/45
    • H03F3/3037H03F3/45183H03F2203/45508H03F2203/45626
    • The invention relates to an electronic output module, especially an electronic output module for CMOS-LVDS levels (LVDS-low voltage differential signalling), for use in analogue and digital high-frequency circuits. Said output module has a first and second transistor (T6, T7) which are connected to a current source (T8) by a first connection and to input terminals by a control connection. A third and fourth transistor (T4, T5) are connected to a supply voltage potential (VOO) by a first connection, to a second connection of the first and second transistors (T6, T7) and to an output terminal by a second connection and to converted input signals by a control connection.
    • 本发明涉及一种电子输出级,特别是用于CMOS LVDS电平(低电压差分信号LVDS),用于模拟和数字高频电路中使用的电子输出级。 该输出级具有第一和被连接到一个电流源(T8)和具有控制端的输入端的第一端子的第二晶体管(T6,T7)。 第三和第四晶体管(T4,T5)都连接到一个第二端子连接到第一和第二晶体管(T6,T7)的第二端子和输出端子,并用一个具有第一端子到电源电压电势(VOO) 控制以下变换的输入信号。
    • 4. 发明申请
    • FULLY DIFFERENTIAL OUTPUT CMOS POWER AMPLIFIER
    • 全差分输出CMOS功率放大器
    • WO1997005696A1
    • 1997-02-13
    • PCT/US1996012238
    • 1996-07-24
    • INFORMATION STORAGE DEVICES, INC.
    • INFORMATION STORAGE DEVICES, INC.TRAN, Hieu, Van
    • H03F03/45
    • H03F3/3001G05F3/242H03F3/3037H03F3/45192H03F3/45479H03F3/45654H03F2203/45418H03F2203/45424
    • A fully differential output CMOS power amplifier suitable to be used in a non-volatile memory mixed mode chip for voice record and playback to drive a very low impedance load such as an 8-ohm speaker from a low voltage supply. This fully differential CMOS power amplifier utilizes a voltage multiplying technique for the input stage (MN2, MN3, MP6, MP7), a level shift/gain stage (MN/P12, MN/P13), and a common mode feedback network (MN1, MN10, MP10). It also utilizes native n-MOS having a threshold voltage VT = 0v for the folded cascode differential input and the source follower output stage (MN7), enhancement n-MOS (VT = 0.7v) for the common source output, and a voltage regulator (22) using p-MOS diode connected devices (M1-M5) for simulating a resistor divider to regulate the voltage multiplier output. The amplifier also includes a mechanism for crossover distortion reduction at the output driver stage, and a scheme to set the idle current in the output driver n-MOS transistors (MN7, MN9).
    • 全差分输出CMOS功率放大器适用于非易失性存储器混合模式芯片,用于语音记录和重放,以从低压电源驱动非常低的阻抗负载,如8欧姆扬声器。 该全差分CMOS功率放大器利用输入级(MN2,MN3,MP6,MP7),电平移位/增益级(MN / P12,MN / P13)和共模反馈网络(MN1, MN10,MP10)。 它还利用对于共用源输出的折叠共源共栅差分输入和源极跟随器输出级(MN7),增强型n-MOS(VT = 0.7v)的阈值电压VT = 0v的本地n-MOS,以及电压调节器 (22)使用p-MOS二极管连接的器件(M1-M5)来模拟电阻分压器来调节电压倍增器输出。 放大器还包括用于在输出驱动级的交叉失真减小的机制,以及设置输出驱动器n-MOS晶体管(MN7,MN9)中的空闲电流的方案。