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    • 6. 发明申请
    • THIN FILM TRANSISTOR AND MANUFACTURING METHOD THEREOF
    • 薄膜晶体管及其制造方法
    • WO2010011038A3
    • 2010-04-22
    • PCT/KR2009003744
    • 2009-07-08
    • ENSILTECH CORPRO JAE-SANGHONG WON-EUI
    • RO JAE-SANGHONG WON-EUI
    • G02F1/136
    • H01L21/02422G02F2202/103G02F2202/104H01L21/02532H01L21/02667H01L27/1281H01L27/1285H01L29/66757
    • The present invention relates to a thin film transistor in which Joule heat is applied to a glass substrate arranged below an amorphous silicon layer to produce stress gradients of a predetermined depth from the surface of the glass substrate and to crystallize the amorphous silicon layer into a polycrystalline silicon layer, thereby improving crystallinity, and relates also to a manufacturing method of the thin film transistor. The present invention provides a thin film transistor comprising: a glass substrate having stress gradients formed at a predetermined depth from an upper surface thereof; a semiconductor layer formed on the glass substrate, and consisting of a polycrystalline silicon layer crystallized by Joule heating; a gate insulation layer formed on the semiconductor layer; a gate electrode formed on the gate insulation layer; an interlayer insulation layer formed on the gate electrode; and a source/drain electrode formed on the interlayer insulation layer and electrically connected to a source/drain region of the semiconductor layer.
    • 本发明涉及一种薄膜晶体管,其中焦耳热被施加到布置在非晶硅层下方的玻璃基板上,以从玻璃基板的表面产生预定深度的应力梯度并且将非晶硅层结晶成多晶 硅层,从而改善结晶性,并且还涉及薄膜晶体管的制造方法。 本发明提供一种薄膜晶体管,其包括:玻璃基板,其具有从其上表面以预定深度形成的应力梯度; 在玻璃基板上形成的由焦耳加热结晶的多晶硅层构成的半导体层; 形成在所述半导体层上的栅极绝缘层; 形成在所述栅极绝缘层上的栅电极; 形成在栅电极上的层间绝缘层; 以及形成在层间绝缘层上并电连接到半导体层的源极/漏极区域的源极/漏极电极。
    • 9. 发明申请
    • METHOD FOR MANUFACTURING LIQUID CRYSTAL DISPLAY
    • 制造液晶显示方法
    • WO00055683A1
    • 2000-09-21
    • PCT/JP1999/007068
    • 1999-12-16
    • H04N5/66G02F1/136G02F1/1362G02F1/1368G09F9/00G09F9/30H01L21/336H01L27/12H01L29/786
    • G02F1/13458G02F1/1362G02F1/1368G02F2202/103H01L27/12
    • A method for manufacturing a liquid crystal display in which the number of masks is decreased to lower the manufacturing cost. A gate insulating film (43), a semiconductor film (45), and a silicon nitride film (47) are formed on a substrate (41) where a gate bus line (3) is formed. Back exposure is carried out using the gate bus line (3) as a mask to pattern the silicon nitride film (47) and to form a channel protective film (47) along the gate bus line (3). Two element-isolation holes (25, 27) are made on both sides of a source electrode (17) and a drain electrode (15) along the gate bus line (3). A semiconductor film (45) electrically isolated from the other pixel regions and interposed between the element-isolation holes (25, 27) constitutes an operation semiconductor film, thus forming a thin film transistor having a gate electrode in the region between two element-isolation holes of the gate bus line (3).
    • 一种液晶显示器的制造方法,其中掩模的数量减少以降低制造成本。 在形成栅极总线(3)的基板(41)上形成有栅极绝缘膜(43),半导体膜(45)和氮化硅膜(47)。 使用栅极总线(3)作为掩模进行背面曝光以对氮化硅膜(47)进行图案化,并沿着栅极总线(3)形成沟道保护膜(47)。 沿着栅极总线(3)在源极(17)和漏极(15)的两侧形成两个元件隔离孔(25,27)。 与其他像素区域电隔离并插入在元件隔离孔(25,27)之间的半导体膜(45)构成工作半导体膜,从而形成在两元件隔离区域之间具有栅电极的薄膜晶体管 栅极总线(3)的孔。
    • 10. 发明申请
    • ACTIVE MATRIX SUBSTRATE
    • 主动矩阵基板
    • WO1997013177A1
    • 1997-04-10
    • PCT/JP1996002858
    • 1996-10-02
    • SEIKO EPSON CORPORATIONSATOU, Takashi
    • SEIKO EPSON CORPORATION
    • G02F01/136
    • H01L27/0266G02F1/136204G02F2202/103H01L27/0255H01L2224/48463H01L2924/13091H01L2924/00
    • A novel method of producing an amorphous silicon thin-film transistor having a reverse stagger structure in fewer process steps, an active matrix substrate equipped with electrostatic protection produced by the production method, and a liquid crystal display device using the substrate. In the production process of a thin film transistor, a contact hole and an opening for connecting an external terminal are simultaneously formed, and an ITO film is used as a wiring. The electrostatic protection comprises a bidirectional diode (electrostatic protective device) constituted by an MOS transistor connected between an electrode (pad) for connecting the external terminal and a common potential line. The electrostatic protective device is substantially a transistor having a large current capacity, and can be formed by using an ordinary TFT process for pixels without causing complexity.
    • 一种在较少的工艺步骤中制造具有反交错结构的非晶硅薄膜晶体管的新颖方法,配备有通过制造方法产生的静电保护的有源矩阵基板和使用该基板的液晶显示装置。 在薄膜晶体管的生产过程中,同时形成接触孔和用于连接外部端子的开口,并且使用ITO膜作为布线。 静电保护包括由连接在用于连接外部端子的电极(焊盘)和公共电位线之间的MOS晶体管构成的双向二极管(静电保护装置)。 静电保护装置基本上是具有大电流容量的晶体管,并且可以通过使用用于像素的普通TFT工艺而不会引起复杂性而形成。