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1. 发明申请

WO2009121861A2 RADIO FREQUENCY MODULATOR 审中-公开
标题翻译：无线电频率调制器
公开(公告)号：WO2009121861A2
公开(公告)日：2009-10-08
申请号：PCT/EP2009/053782
申请日：2009-03-31
申请人： NXP B. V. , HE, Xin , VAN SINDEREN, Jan , COLLADOS ASENSIO, Manel , PAVLOVIC, Nenad
发明人： HE, Xin , VAN SINDEREN, Jan , COLLADOS ASENSIO, Manel , PAVLOVIC, Nenad
IPC分类号： H03D7/14
CPC分类号： H03D7/1441 , H03D7/1433 , H03D7/1458 , H03D7/165 , H03D2200/0019 , H03D2200/0084 , H03D2200/009 , H03G1/0088
摘要： The present application relates to a radio frequency modulator comprising at least two unit cells, wherein at least one unit cell comprises a local oscillator input terminal. The at least one unit cell is configured to generate at least one up-converted output signal depending on a local oscillator signal. The at least one unit cell comprises at least one data input terminal, wherein the data input terminal is arranged to receive at least a first data signal. The at least one unit cell is configured such that the generating of the up-converted output signal is deactivatable at least depending on the first data signal. The present application relates also to a transmitter, a method for generating an up-converted output signal and a computer readable medium having a computer program stored thereon.
摘要翻译：本申请涉及一种包括至少两个单元的射频调制器，其中至少一个单元包括本地振荡器输入端。所述至少一个单元单元被配置为根据本地振荡器信号产生至少一个上变频输出信号。所述至少一个单元单元包括至少一个数据输入端，其中所述数据输入端被布置为接收至少第一数据信号。至少一个单元单元被配置为使得上变频输出信号的产生至少取决于第一数据信号而失活。本申请还涉及发射机，用于产生上变频输出信号的方法和其上存储有计算机程序的计算机可读介质。

2. 发明申请

WO2010003864A3 DIGITAL MODULATOR 审中-公开
公开(公告)号：WO2010003864A3
公开(公告)日：2010-01-14
申请号：PCT/EP2009/058282
申请日：2009-07-01
申请人： NXP B.V. , COLLADOS ASENSIO, Manel , HE, Xin , PAVLOVIC, Nenad , VAN SINDEREN, Jan
发明人： COLLADOS ASENSIO, Manel , HE, Xin , PAVLOVIC, Nenad
IPC分类号： H03C5/00
摘要： The present application relates to a digital modulator comprising an output stage comprising a number of unit cell arrays, and a sampling stage. The present application relates also to a communication device comprising said digital modulator, a method for digitally modulating and a computer program product. More particularly, the digital modulator comprises an output stage comprising a number of unit cell arrays, wherein the output stage comprises at least one carrier frequency signal input terminal configured to receive a carrier frequency signal. The digital modulator comprises a sampling stage connectable to the output stage, wherein the sampling stage is configured to oversample at least one data input signal. The digital modulator comprises at least one sampling clock generating device configured to generate at least one sampling clock signal depending on the number of arranged unit cell arrays and the carrier frequency signal.

3. 发明申请

WO2010000746A1 CIRCUIT WITH A TIME TO DIGITAL CONVERTER AND PHASE MEASURING METHOD 审中-公开
标题翻译：电路与数字转换器和相位测量方法
公开(公告)号：WO2010000746A1
公开(公告)日：2010-01-07
申请号：PCT/EP2009/058201
申请日：2009-06-30
申请人： NXP B.V. , PAVLOVIC, Nenad , COLLADOS ASENSIO, Manel , HE, Xin , VAN SINDEREN, Jan
发明人： PAVLOVIC, Nenad , COLLADOS ASENSIO, Manel , HE, Xin , VAN SINDEREN, Jan
IPC分类号： H03D13/00 , H03L7/091
CPC分类号： H03L7/085 , H03L7/091
摘要： Calibration data for calibrating time to digital conversion is obtained by switching a feed circuit (20) of a time to digital converter between a normal operating mode or a calibration mode. A delay circuit (22) with a delay circuit input and a plurality of taps outputs respective, differently delayed versions of a signal from a delay circuit input. A sampling register (24) has data inputs coupled to the taps, and samples data from the data inputs in response to an active transition at a clock input. When in the normal operating mode, the feed circuit (2) feeds an oscillator signal of an oscillator circuit (10) to the delay circuit input and a reference signal to the clock input of the sampling register (24). When in the calibration mode, the feed circuit (20) supplies signals with transitions having timing controlled by the oscillator signal to both the delay circuit input and the clock input. The feed circuit (20) provides for selection of transitions of the oscillator signal that control timing of a first active transition at the clock circuit after a transition at the delay circuit input. A control circuit (28) switches the feed circuit between the normal operating mode and the calibration mode, and controls the feed circuit (20) successively to select a plurality of different transitions to control timing of the first active transition in the calibration mode. The control circuit reads out resulting data from the sampling register (24) for each selection and determine calibration data for the oscillator signal from said data.
摘要翻译：通过在正常操作模式或校准模式之间切换时间到数字转换器的馈电电路（20）来获得校准数字转换时间的校准数据。具有延迟电路输入和多个抽头的延迟电路（22）输出来自延迟电路输入的信号的相应不同延迟的版本。采样寄存器（24）具有耦合到抽头的数据输入，并响应于在时钟输入处的有源转换从数据输入端采样数据。当处于正常工作模式时，馈电电路（2）将振荡器电路（10）的振荡器信号馈送到延迟电路输入端，并将参考信号馈送到采样寄存器（24）的时钟输入端。当处于校准模式时，馈电电路（20）将具有由振荡器信号控制的定时的转换信号提供给延迟电路输入和时钟输入。馈电电路（20）提供选择振荡器信号的转换，该振荡器信号在延迟电路输入的转变之后控制时钟电路处的第一有源跃迁的定时。控制电路（28）在正常操作模式和校准模式之间切换供电电路，并且连续地控制馈电电路（20）以选择多个不同的转变以控制校准模式中的第一主动转换的定时。控制电路从每个选择的采样寄存器（24）中读出结果数据，并根据所述数据确定振荡器信号的校准数据。

4. 发明申请

WO2009113000A3 OUTPUT STAGE FOR A DIGITAL RF TRANSMITTER, METHOD FOR PROVIDING AN RF OUTPUT SIGNAL IN A DIGITAL RF TRANSMITTER, AND DIGITAL RF TRANSMITTER 审中-公开
公开(公告)号：WO2009113000A3
公开(公告)日：2009-09-17
申请号：PCT/IB2009/050960
申请日：2009-03-09
申请人： NXP B.V. , HE, Xin , COLLADOS ASENSIO, Manel , PAVLOVIC, Nenad , VAN SINDEREN, Jan
发明人： HE, Xin , COLLADOS ASENSIO, Manel , PAVLOVIC, Nenad , VAN SINDEREN, Jan
IPC分类号： H04B1/04
摘要： An output stage (1) for a digital RF transmitter is provided. The output stage comprises: an input adapted to receive an input signal (RFin, b7-b0) to be transmitted; a plurality N of power amplification sections (S1, S2, S3, S4); and an output (A, B) providing an output voltage signal. Each of the N power amplification sections (S1, S2, S3, S4) is arranged to receive the input signal (RFin, b7-b0) and comprises a transformer (T1, T2, T3, T4) adapted to provide a respective output signal. Each transformer comprises a primary stage and a secondary stage; the secondary stages of the transformers (T1, T2, T3, T4) of the N power amplification sections (S1, S2, S3, S4) are combined such that a combined output voltage signal of the output stage is provided. The N power amplification sections (S1, S2, S3, S4) are adapted such that the input signal (RFin, b7-b0) is latched by clock signals (clock1, clock2, clock3, clock4) comprising different phases.

5. 发明申请

WO2007144806A3 POLAR SIGNAL GENERATOR 审中-公开
公开(公告)号：WO2007144806A3
公开(公告)日：2007-12-21
申请号：PCT/IB2007/052127
申请日：2007-06-06
申请人： NXP B.V. , COLLADOS ASENSIO, Manel , PAVLOVIC, Nenad , VIDOJKOVIC, Vojkan , VAN ZEIJL, Paulus, T., M.
发明人： COLLADOS ASENSIO, Manel , PAVLOVIC, Nenad , VIDOJKOVIC, Vojkan , VAN ZEIJL, Paulus, T., M.
IPC分类号： H03C3/40
摘要： The present invention relates to a polar signal generator and method of deriving phase and amplitude components from in-phase (I) and quadrature-phase (Q) components of an input signal, wherein the I and Q components are generated at a first sampling frequency based on the input signal, and are then up-sampled in accordance with a predetermined first interpolation factor (N), to generate up-sampled I and Q components at a second sampling frequency higher than the first sampling frequency. The up-sampled I and Q components are converted into the phase and amplitude components, wherein the converting step is operated at the second sampling frequency. Moreover, the phase and amplitude components can be further up-sampled, optionally by different sampling frequencies, to a third and a fourth sampling frequency. Thereby, I-Q generation and cartesian-to -polar transformation can be performed at lower frequencies, which reduces power consumption.

6. 发明申请

WO2008001269A2 IMPROVED PHASE-TO-FREQUENCY CONVERSION FOR POLAR TRANSMITTERS 审中-公开
标题翻译：改进用于极性发射器的相位频率转换
公开(公告)号：WO2008001269A2
公开(公告)日：2008-01-03
申请号：PCT/IB2007/052348
申请日：2007-06-19
申请人： NXP B.V. , COLLADOS ASENSIO, Manel , PAVLOVIC, Nenad , VIDOJKOVIC, Vojkan , VAN ZEIJL, Paulus, T., M.
发明人： COLLADOS ASENSIO, Manel , PAVLOVIC, Nenad , VIDOJKOVIC, Vojkan , VAN ZEIJL, Paulus, T., M.
IPC分类号： H04L27/36
CPC分类号： H04L27/361 , H03C5/00
摘要： The present invention relates to a polar transmission method and a polar transmitter for transmitting phase and amplitude components derived from in-phase (I) and quadrature-phase (Q) components of an input signal. A first conversion is provided for converting the in-phase (I) and quadrature-phase (Q) components into the phase and amplitude components at a first sampling rate. Additionally, a second conversion is provided for converting the phase component into a frequency component, wherein the second conversion comprises a rate conversion for converting the first sampling rate into a lower second sampling rate at which the frequency component is provided. Thereby, the second sampling rate can be used as a lower update rate in a digitally controlled oscillator in order to save power or because of speed limitations, while the surplus phase samples obtain due to the higher first sampling rate enable better approximation of the phase component after the digitally controlled oscillator. This better approximation accounts for a cleaner spectrum around the synthesized channel.
摘要翻译：本发明涉及一种用于发送从输入信号的同相（I）和正交相（Q）分量导出的相位和幅度分量的极性传输方法和极性发射器。提供了第一转换，用于以第一采样率将同相（I）和正交相（Q）分量转换成相位和幅度分量。另外，提供了将相位分量转换成频率分量的第二转换，其中第二转换包括用于将第一采样率转换成提供频率分量的较低第二采样率的速率转换。因此，为了节省功率或由于速度限制，第二采样率可以用作数字控制振荡器中的较低更新速率，而由于较高的第一采样率而获得的剩余相位采样使得能够更好地近似相位分量数字控制振荡器后。这个更好的近似解释了合成通道周围更清晰的频谱。

7. 发明申请

WO2009022254A1 MULTIPLE TRANSMISSION APPARATUS WITH REDUCED COUPLING 审中-公开
标题翻译：具有减少耦合的多传输装置
公开(公告)号：WO2009022254A1
公开(公告)日：2009-02-19
申请号：PCT/IB2008/053106
申请日：2008-08-04
申请人： KONINKLIJKE PHILIPS ELECTRONICS N.V. , VAN ZEIJL, Paulus, T., M. , DUPERRAY, David, B., D. , COLLADOS ASENSIO, Manel
发明人： VAN ZEIJL, Paulus, T., M. , DUPERRAY, David, B., D. , COLLADOS ASENSIO, Manel
IPC分类号： H04B1/04
CPC分类号： H04B1/0475 , H04B1/0483
摘要： The present invention relates to a transmission apparatus having at least two transmission branches for transmitting respective transmission signals at substantially same frequencies, and to a method of controlling such a transmission apparatus. A first oscillator circuit (62) is provided for generating a first signal at a first frequency to be used in a first transmission branch. Additionally, a second oscillator circuit (64) is provided for generating a second signal at a second frequency to be used in a second transmission branch, the second frequency being different from the first frequency. To enable transmission of the transmission signals at said substantially same frequencies, at least one frequency divider or multiplier (72, 74) is provided for dividing or respectively multiplying at least one of said first and second frequencies by a respective predetermined factor. Thereby, the first and second oscillator circuits can be operated at different frequencies, so that mutual coupling can be reduced.
摘要翻译：本发明涉及具有至少两个用于以基本上相同的频率发送各个发送信号的发送分支的发送装置，以及一种控制这种发送装置的方法。提供第一振荡器电路（62），用于产生要在第一传输分支中使用的第一频率的第一信号。此外，提供第二振荡器电路（64），用于产生要在第二传输分支中使用的第二频率的第二信号，第二频率与第一频率不同。为了能够以所述基本相同的频率传输传输信号，提供了至少一个分频器或乘法器（72,74），用于将所述第一和第二频率中的至少一个频率分频或分别乘以相应的预定因子。因此，第一和第二振荡器电路可以以不同的频率工作，从而可以减少互耦。

8. 发明申请

WO2009115989A2 LOW-NOISE MIXING UNIT 审中-公开
标题翻译：低噪声混合单元
公开(公告)号：WO2009115989A2
公开(公告)日：2009-09-24
申请号：PCT/IB2009/051131
申请日：2009-03-17
申请人： NXP B.V. , DE JONG, Gerben, W. , COLLADOS ASENSIO, Manel
发明人： DE JONG, Gerben, W. , COLLADOS ASENSIO, Manel
CPC分类号： H03D7/166 , H03D7/1433 , H03D7/1441 , H03D7/1466 , H03D7/1483 , H03D2200/0084
摘要： The present application relates to an apparatus comprising a low-noise mixing unit, and more particularly to a receiver comprising the apparatus. The apparatus comprises a mixing unit configured to frequency down convert an input signal. The mixing unit comprises a number of switching units. The apparatus encompasses a generating unit configured to generate at least one local oscillator signal. The generating unit is configured to drive the number of switching units such that a maximum of one of the switching units is conductive at a certain time.
摘要翻译：本申请涉及一种包括低噪声混合单元的装置，更具体地涉及包括该装置的接收机。该装置包括被配置为降频转换输入信号的混合单元。混合单元包括多个开关单元。该装置包括被配置为产生至少一个本地振荡器信号的生成单元。生成单元被配置为驱动开关单元的数量，使得最多一个开关单元在一定时间导通。

9. 发明申请

WO2004110086A1 FREQUENCY MULTIPLEXED ARCHITECTURE 审中-公开
标题翻译：频率多路复用架构
公开(公告)号：WO2004110086A1
公开(公告)日：2004-12-16
申请号：PCT/IB2004/050776
申请日：2004-05-26
申请人： KONINKLIJKE PHILIPS ELECTRONICS N.V. , COLLADOS ASENSIO, Manel , DE JONG, Gerben, W.
发明人： COLLADOS ASENSIO, Manel , DE JONG, Gerben, W.
IPC分类号： H04Q7/30
CPC分类号： H04B1/006 , H04B1/005 , H04B1/406
摘要： A receiver (10) is arranged to simultaneously receive at least a first (S1) radio frequency signal having a first frequency band (1) and a second radio frequency signal (S3) having a second frequency band (3) that is at least partly overlapping the first frequency band (1). The receiver has frequency down-conversion means (32,33) for frequency down converting the at least first (S1) and second radio frequency signals (S3) to at least a first (S2) and a second (S4) lower frequency signal and multiplexing means (34) for sequentially multiplexing the at least first (S2) and second lower frequency signals (S4) into a frequency multiplexed signal (S5).
摘要翻译：接收机（10）被布置成同时接收具有第一频带（1）的第一（S1）射频信号和具有至少部分地具有第二频带（3）的第二射频信号（S3）与第一频带（1）重叠。接收机具有频率下变频装置（32,33），用于将至少第一（S1）和第二射频信号（S3）降频转换成至少第一（S2）和第二（S4）较低频率信号，以及用于将所述至少第一（S2）和第二低频信号（S4）顺序复用为频率复用信号（S5）的多路复用装置（34）。

10. 发明申请

WO2004049593A1 APPARATUS, MODULE AND COMPUTER PROGRAM FOR MINIMIZING CORRELATION BETWEEN RECEIVED SIGNALS 审中-公开
标题翻译：用于最小化接收到信号之间的相关性的装置，模块和计算机程序
公开(公告)号：WO2004049593A1
公开(公告)日：2004-06-10
申请号：PCT/IB2003/004876
申请日：2003-10-29
申请人： KONINKLIJKE PHILIPS ELECTRONICS N.V. , VANDEWIELE, Bertrand, J., L. , MATTHEIJSSEN, Paul , COLLADOS ASENSIO, Manel
发明人： VANDEWIELE, Bertrand, J., L. , MATTHEIJSSEN, Paul , COLLADOS ASENSIO, Manel
IPC分类号： H04B7/08
CPC分类号： H04L1/06 , H04B1/7117 , H04B7/082 , H04B7/0854
摘要： An apparatus that comprises means to simultaneously receive a first number of signals and a larger number of signal pathways comprises means to determine the correlation between first said number of signals for each of the possible signal pathways. The apparatus also comprises means to select from said second number of possible signal pathways an optimal subset of signal pathways that assure that there is a minimum level of correlation between said received first number of signals.
摘要翻译：包括同时接收第一数量信号和更多数量的信号路径的装置的装置包括确定每个可能信号路径的第一所述信号数之间的相关性的装置。该装置还包括用于从所述第二数量的可能的信号路径中选择信号通路的最佳子集，以确保在所述接收的第一数量信号之间存在最小相关度的装置。

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