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1. 发明申请

WO2021005445A1 DATA PLACEMENT IN WRITE CACHE ARCHITECTURE SUPPORTING READ HEAT DATA SEPARATION 审中-公开
公开(公告)号：WO2021005445A1
公开(公告)日：2021-01-14
申请号：PCT/IB2020/056017
申请日：2020-06-25
申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION , IBM UNITED KINGDOM LIMITED , IBM (CHINA) INVESTMENT COMPANY LIMITED
发明人： PLETKA, Roman, Alexander , FISHER, Timothy , FRY, Aaron, Daniel , PAPANDREOU, Nikolaos , IOANNOU, Nikolas , TOMIC, Sasa , STOICA, Radu, Ioan , POZIDIS, Charalampos , WALLS, Andrew
IPC分类号： G06F3/06
摘要： A computer-implemented method, according to one approach, includes: receiving write requests, accumulating the write requests in a destage buffer, and determining a current read heat value of each logical page which corresponds to the write requests. Each of the write requests is assigned to a respective write queue based on the current read heat value of each logical page which corresponds to the write requests. Moreover, each of the write queues correspond to a different page stripe which includes physical pages, the physical pages included in each of the respective page stripes being of a same type. Furthermore, data in the write requests is destaged from the write queues to their respective page stripes. Other systems, methods, and computer program products are described in additional approaches.

2. 发明申请

WO2017103751A1 RECOVERY OF MULTI-PAGE FAILURES IN NON-VOLATILE MEMORY SYSTEM 审中-公开
标题翻译：非易失性存储器系统中多页面故障的恢复
公开(公告)号：WO2017103751A1
公开(公告)日：2017-06-22
申请号：PCT/IB2016/057479
申请日：2016-12-09
申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION , IBM UNITED KINGDOM LIMITED , IBM (CHINA) INVESTMENT COMPANY LIMITED
发明人： PLETKA, Roman , CAMP, Charles, John , FRY, Aaron, Daniel , FISHER, Timothy, John , IOANNOU, Nikolas , TOMIC, Sasa , PARNELL, Thomas
IPC分类号： G06F11/00
CPC分类号： G06F11/1068 , G06F3/0619 , G06F3/064 , G06F3/0688 , G06F12/0246 , G06F2212/1032 , G06F2212/262
摘要： A data storage system includes a controller and a non-volatile memory array having a plurality of blocks each including a plurality of physical pages. The controller maintains a logical-to-physical translation (LPT）data structure that maps logical addresses to physical addresses and implements a first data protection scheme that stripes write data over the plurality of physica1 blocks. In response to a read request requesting data from a target page stripe, the controller detecting errors in multiple physical pages of the target page stripe. In responsive to detecting errors in multiple physical pages of the target page stripe, the controller scans the LPT data structure to identify a set of logical addresses mapped to the target page stripe and triggers recovery of the target page stripe by a higher level controller that implements a second data protection scheme, wherein triggering recovery includes transmitting the set of logical addresses to the higher level controller.
摘要翻译：数据存储系统包括控制器和具有多个块的非易失性存储器阵列，每个块包括多个物理页面。控制器维护将逻辑地址映射到物理地址的逻辑到物理转换（LPT）数据结构，并且实现在多个物理块上分条写入数据的第一数据保护方案。响应于请求来自所述控制器检测所述目标页面条带的多个物理页面中的错误;响应于检测到所述目标页面条带的多个物理页面中的错误，所述控制器扫描所述LPT数据结构以识别映射到所述目标页面条带的逻辑地址集合目标页面条带并且触发由实现第二数据保护方案的更高级别控制器对条带目标页面的恢复，其中触发恢复包括将该组逻辑地址发送到更高级别控制器。

3. 发明申请

WO2020250071A1 WEAR-AWARE BLOCK MODE CONVERSION IN NON-VOLATILE MEMORY 审中-公开
公开(公告)号：WO2020250071A1
公开(公告)日：2020-12-17
申请号：PCT/IB2020/055061
申请日：2020-05-28
申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION , IBM UNITED KINGDOM LIMITED , IBM (CHINA) INVESTMENT COMPANY LIMITED
发明人： TOMIC, Sasa , PLETKA, Roman, Alexander , IOANNOU, Nikolas , PAPANDREOU, Nikolaos , FRY, Aaron, Daniel , FISHER, Timothy , STOICA, Radu, Ioan
IPC分类号： G06F3/06
摘要： A non-volatile memory includes a plurality of physical blocks of storage each including a respective plurality of cells, where each of the plurality of cells is individually capable of storing multiple bits of data. A controller assigns physical blocks among the plurality of physical blocks to a first pool containing physical blocks operating in a first (e.g., QLC) mode for storing a greater number of bits per cell and assigns other physical blocks among the plurality of physical blocks to a second pool containing physical blocks operating in a second (e.g., SLC) mode for storing a lesser number of bits per cell. The controller transfers physical blocks between the first pool and the second pool based on at least bit error rates measured for the transferred physical blocks.

4. 发明申请

WO2017187334A1 DATA DEDUPLICATION WITH REDUCED HASH COMPUTATIONS 审中-公开
标题翻译：数据重复删除哈希计算
公开(公告)号：WO2017187334A1
公开(公告)日：2017-11-02
申请号：PCT/IB2017/052365
申请日：2017-04-25
申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION , IBM UNITED KINGDOM LIMITED , IBM (CHINA) INVESTMENT COMPANY LIMITED
发明人： FISHER, Timothy, John , IOANNOU, Nikolas , PARNELL, Thomas , PLETKA, Roman , TOMIC, Sasa
IPC分类号： G06F12/00
CPC分类号： G06F11/1004 , G06F3/0608 , G06F3/0641 , G06F3/0644 , G06F3/0661 , G06F3/0688 , G06F16/215
摘要： Techniques for data deduplication in a data storage system include comparing a first attribute of a received data page to first attributes of one or more stored data pages. In response to the first attribute matching one of the first attributes, a second attribute of the received data page is compared to second attributes of the one or more data pages. In response to the second attribute of the received data page matching one of the second attributes, a fingerprint of the received data page is compared to fingerprints of the one or more data pages. In response to the fingerprint of the received data page matching one of the fingerprints, the received data page is discarded and replaced with a reference to the corresponding data page already stored in the storage system. In response to first attribute, the second attribute, or the fingerprint of the received data page not matching, the received data page is stored.
摘要翻译：数据存储系统中的数据重复删除技术包括将接收到的数据页面的第一属性与一个或多个存储的数据页面的第一属性进行比较。响应于与第一属性之一匹配的第一属性，将接收到的数据页面的第二属性与一个或多个数据页面的第二属性进行比较。响应于接收到的数据页面的第二属性匹配第二属性之一，将接收到的数据页面的指纹与一个或多个数据页面的指纹进行比较。响应于接收到的数据页面与指纹之一相匹配的指纹，丢弃接收到的数据页面并且用已经存储在存储系统中的对应数据页面的引用替换。响应于第一属性，第二属性或所接收的数据页面的指纹不匹配，存储所接收的数据页面。

5. 发明申请

WO2018042270A1 WORKLOAD OPTIMIZED DATA DEDUPLICATION USING GHOST FINGERPRINTS 审中-公开
标题翻译：工作量优化的数据重复使用GHOST指纹
公开(公告)号：WO2018042270A1
公开(公告)日：2018-03-08
申请号：PCT/IB2017/054421
申请日：2017-07-21
申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION , IBM UNITED KINGDOM LIMITED , IBM (CHINA) INVESTMENT COMPANY LIMITED
发明人： IOANNOU, Nikolas , PLETKA, Roman , SONG, Cheng-Chung , STOICA, Radu, Ioan , TOMIC, Sasa , WALLS, Andrew
IPC分类号： G06F17/30
摘要： A controller of a data storage system generates fingerprints of data blocks written to the data storage system. The controller maintains, in a data structure, respective state information for each of a plurality of data blocks. The state information for each data block can be independently set to indicate any of a plurality of states, including at least one deduplication state and at least one non-deduplication state. At allocation of a data block, the controller initializes the state information for the data block to a non-deduplication state and, thereafter, in response to detection of a write of duplicate of the data block to the data storage system, transitions the state information for the data block to a deduplication state. The controller selectively performs data deduplication for data blocks written to the data storage system based on the state information in the data structure and by reference to the fingerprints.
摘要翻译：数据存储系统的控制器产生写入数据存储系统的数据块的指纹。控制器在数据结构中维持多个数据块中的每一个的相应状态信息。每个数据块的状态信息可以被独立设置以指示多个状态中的任何一个，包括至少一个去重复状态和至少一个非去重复状态。在分配数据块时，控制器将数据块的状态信息初始化为非重复删除状态，并且此后，响应于检测到数据块的重复写入到数据存储系统，转换状态信息为数据块重复数据删除状态。控制器基于数据结构中的状态信息并参照指纹有选择地对写入数据存储系统的数据块执行重复数据删除。

6. 发明申请

WO2021001725A1 BLOCK MODE TOGGLING IN DATA STORAGE SYSTEM 审中-公开
公开(公告)号：WO2021001725A1
公开(公告)日：2021-01-07
申请号：PCT/IB2020/055914
申请日：2020-06-23
申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION , IBM UNITED KINGDOM LIMITED , IBM (CHINA) INVESTMENT COMPANY LIMITED
发明人： PLETKA, Roman, Alexander , FRY, Aaron, Daniel , FISHER, Timothy , TOMIC, Sasa , PAPANDREOU, Nikolaos , IOANNOU, Nikolas , STOICA, Radu, Ioan , POZIDIS, Charalampos , WALLS, Andrew
IPC分类号： G06F12/00
摘要： A computer-implemented method, according to one embodiment, includes: maintaining a block switching metric for each block of memory in the storage system. A determination is made as to whether a first block in a first pool should be transferred to a second pool according to a block switching metric which corresponds to the first block. In response to determining that the first block in the first pool should be transferred to the second pool according to the block switching metric which corresponds to the first block, the first block is erased. The first block is then transferred from the first pool to a second RTU queue which corresponds to the second pool. A second block in the second pool is also erased and transferred from the second pool to a first RTU queue which corresponds to the first pool.

7. 发明申请

WO2021001724A1 ADAPTING BLOCK POOL SIZES IN A STORAGE SYSTEM 审中-公开
公开(公告)号：WO2021001724A1
公开(公告)日：2021-01-07
申请号：PCT/IB2020/055904
申请日：2020-06-23
申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION , IBM UNITED KINGDOM LIMITED , IBM (CHINA) INVESTMENT COMPANY LIMITED
发明人： PLETKA, Roman, Alexander , STOICA, Radu, Ioan , TOMIC, Sasa , PAPANDREOU, Nikolaos , IOANNOU, Nikolas , FRY, Aaron, Daniel , FISHER, Timothy , POZIDIS, Charalampos , WALLS, Andrew
IPC分类号： G06F12/00
摘要： A computer-implemented method, according to one embodiment, includes: determining whether a number of blocks included in a first ready-to-use (RTU) queue is in a first range of the first RTU queue. In response to determining that the number of blocks included in the first RTU queue is in the first range, a determination is made as to whether a number of blocks included in a second RTU queue is in a second range of the second RTU queue. Moreover, in response to determining that the number of blocks included in the second RTU queue is not in the second range, valid data is relocated from one of the blocks in a first pool which corresponds to the first RTU queue. The block in the first pool is erased, and transferred from the first pool to the second RTU queue which corresponds to a second pool.

8. 发明申请

WO2021008868A1 A METHOD FOR INTERFACING WITH HARDWARE ACCELERATORS 审中-公开
公开(公告)号：WO2021008868A1
公开(公告)日：2021-01-21
申请号：PCT/EP2020/068377
申请日：2020-06-30
申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION , IBM UNITED KINGDOM LIMITED
发明人： PIVETEAU, Christophe , IOANNOU, Nikolas , KRAWCZUK, Igor , LE GALLO-BOURDEAU, Manuel , SEBASTIAN, Abu , ELEFTHERIOU, Evangelos, Stavros
IPC分类号： G06F9/48 , G06N3/04 , G06N3/08
摘要： The present disclosure relates to a method for executing a computation task composed of at least one set of operations where subsets of pipelineable operations of the set of operations are determined in accordance with a pipelining scheme. A single routine may be created for enabling execution of the determined subsets of operations by a hardware accelerator. The routine has, as arguments, a value indicative of input data and values of configuration parameters of the computation task, where a call of the routine causes a scheduling of the subsets of operations on the hardware accelerator in accordance with the values of the configuration parameters. Upon receiving input data of the computation task, the routine may be called to cause the hardware accelerator to perform by the computation task in accordance with the scheduling.

9. 发明申请

WO2021084365A1 UPDATING CORRECTIVE READ VOLTAGE OFFSETS IN NON-VOLATILE RANDOM ACCESS MEMORY 审中-公开
公开(公告)号：WO2021084365A1
公开(公告)日：2021-05-06
申请号：PCT/IB2020/059745
申请日：2020-10-16
申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION , IBM (CHINA) INVESTMENT COMPANY LTD. , IBM DEUTSCHLAND GMBH
发明人： PAPANDREOU, Nikolaos , POZIDIS, Charalampos , IOANNOU, Nikolas , PLETKA, Roman , STOICA, Radu , TOMIC, Sasa , FRY, Aaron , FISHER, Timothy
IPC分类号： G06F11/07 , G06F11/10 , G11C16/26
摘要： A computer-implemented method, according to one approach, includes: using a first calibration scheme to calibrate the given page in the block by calculating a first number of independent read voltage offset values for the given page (606). An attempt is made to read the calibrated given page (608), and in response to determining that an error correction code failure occurred when attempting to read the calibrated given page, a second calibration scheme is used to recalibrate the given page in the block (612). The second calibration scheme is configured to calculate a second number of independent read voltage offset values for the given page. An attempt to read the recalibrated given page is also made (614). In response to determining that an error correction code failure did occur when attempting to read the recalibrated given page, one or more instructions to relocate data stored in the given page are sent (618).

10. 发明申请

WO2023275632A1 MIRRORING DATA IN WRITE CACHES OF CONTROLLER OF NON-VOLATILE MEMORY 审中-公开
公开(公告)号：WO2023275632A1
公开(公告)日：2023-01-05
申请号：PCT/IB2022/054831
申请日：2022-05-24
申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION , IBM ISRAEL SCIENCE AND TECHNOLOGY LTD. , IBM (CHINA) INVESTMENT COMPANY LTD.
发明人： PLETKA, Roman , FISHER, Timothy , YANES, Adalberto , PAPANDREOU, Nikolaos , STOICA, Radu , POZIDIS, Charalampos , IOANNOU, Nikolas
IPC分类号： G06F12/08 , G06F12/0246 , G06F12/0844 , G06F12/0868 , G06F2212/72 , G06F2212/7201 , G06F2212/7203 , G06F3/0604 , G06F3/061 , G06F3/0611 , G06F3/0613 , G06F3/0656 , G06F3/0659 , G06F3/0679
摘要： A data storage system provides persistent storage in bulk non-volatile memory. A controller of the data storage system receives a host write command and buffers associated host write data in both a first write cache in non-volatile memory and a mirrored second write cache in volatile memory. The controller destages the host write data to the bulk non-volatile memory from the second write cache but not the first write cache. The controller services relocation write commands requesting data relocation within the bulk non-volatile memory by reference to the second write cache. Servicing the relocation write commands includes buffering relocation write data in the second write cache but not the first write cache and destaging the relocation write data to the bulk non-volatile memory from the second write cache.

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