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    • 6. 发明申请
    • A WIRELESS DEVICE HAVING DUAL BUS ARCHITECTURE FOR INTERFACING WITH CELLULAR SIGNALS AND SHORT-RANGE RADIO SIGNALS
    • 具有双总线结构的无线设备,用于与蜂窝信号和短距离无线电信号进行接口
    • WO2004109964A2
    • 2004-12-16
    • PCT/US2004/017100
    • 2004-06-02
    • IXI MOBILE, INC.YITZCHAK, AviFORNELL, PeterHALLER, AmitHAPARNAS, Ziv
    • YITZCHAK, AviFORNELL, PeterHALLER, AmitHAPARNAS, Ziv
    • H04L
    • H04W88/06H04W84/042H04W84/10
    • A wireless device having dual bus architecture for interfacing with cellular signals and short-range radio signals is provided in an embodiment of the present invention. A first bus couples a first processor to a first transceiver capable to transmit and receive cellular signals. A second bus couples a second processor to a second transceiver capable to transmit and receive short-range radio signals. A third bus is coupled to the first processor and the second processor for transferring multiplexed commands and data. A fourth bus is coupled to the first processor and the second processor for transferring an audio signal, such as a human voice. In an embodiment of the present invention, each processor has a universal asynchronous receiver-transmitter ("UART") coupled to the third bus, such as a RS-232 bus, and the fourth bus is a pulse code modulation ("PCM") bus. A first memory device is coupled to the second bus and stores a microrouter software component for transferring an Internet protocol ("IP") packet.
    • 在本发明的实施例中提供了具有用于与蜂窝信号和短程无线电信号进行接口的双总线架构的无线设备。 第一总线将第一处理器耦合到能够发送和接收蜂窝信号的第一收发器。 第二总线将第二处理器耦合到能够发送和接收短距离无线电信号的第二收发器。 第三总线耦合到第一处理器和第二处理器,用于传送复用的命令和数据。 第四总线耦合到第一处理器和第二处理器,用于传送诸如人声的音频信号。 在本发明的一个实施例中,每个处理器具有耦合到诸如RS-232总线的第三总线的通用异步接收器 - 发射器(“UART”),并且第四总线是脉冲编码调制(“PCM”) 总线。 第一存储器件耦合到第二总线并且存储用于传送因特网协议(“IP”)分组的微控制器软件组件。
    • 10. 发明申请
    • A WIRELESS DEVICE HAVING DUAL BUS ARCHITECTURE FOR INTERFACING WITH CELLULAR SIGNALS AND SHORT-RANGE RADIO SIGNALS
    • 具有双总线结构的无线设备,用于与蜂窝信号和短距离无线电信号进行接口
    • WO2004109964A3
    • 2007-05-31
    • PCT/US2004017100
    • 2004-06-02
    • IXI MOBILE INCYITZCHAK AVIFORNELL PETERHALLER AMITHAPARNAS ZIV
    • YITZCHAK AVIFORNELL PETERHALLER AMITHAPARNAS ZIV
    • H04M3/00H04L20060101
    • H04W88/06H04W84/042H04W84/10
    • A wireless device having dual bus architecture for interfacing with cellular signals and short-range radio signals is provided in an embodiment of the present invention. A first bus couples a first processor to a first transceiver capable to transmit and receive cellular signals. A second bus couples a second processor to a second transceiver capable to transmit and receive short-range radio signals. A third bus is coupled to the first processor and the second processor for transferring multiplexed commands and data. A fourth bus is coupled to the first processor and the second processor for transferring an audio signal, such as a human voice. In an embodiment of the present invention, each processor has a universal asynchronous receiver-transmitter ("UART") coupled to the third bus, such as a RS-232 bus, and the fourth bus is a pulse code modulation ("PCM") bus. A first memory device is coupled to the second bus and stores a microrouter software component for transferring an Internet protocol ("IP") packet.
    • 在本发明的实施例中提供了具有用于与蜂窝信号和短程无线电信号进行接口的双总线架构的无线设备。 第一总线将第一处理器耦合到能够发送和接收蜂窝信号的第一收发器。 第二总线将第二处理器耦合到能够发送和接收短距离无线电信号的第二收发器。 第三总线耦合到第一处理器和第二处理器,用于传送复用的命令和数据。 第四总线耦合到第一处理器和第二处理器,用于传送诸如人声的音频信号。 在本发明的一个实施例中,每个处理器具有耦合到诸如RS-232总线的第三总线的通用异步接收器 - 发射器(“UART”),并且第四总线是脉冲编码调制(“PCM”) 总线。 第一存储器件耦合到第二总线并且存储用于传送因特网协议(“IP”)分组的微控制器软件组件。