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1. 发明申请

US20040246691A1 Dual pitch contact pad footprint for flip-chip chips and modules 失效
标题翻译：用于倒装芯片和模块的双音高接触焊盘尺寸
公开(公告)号：US20040246691A1
公开(公告)日：2004-12-09
申请号：US10455982
申请日：2003-06-05
申请人： International Business Machines Corporation
发明人： Timothy W. Budell , David B. Stone , Jerzy M. Zalesinski
IPC分类号： H05K007/10 , H05K007/12
CPC分类号： H01L23/49838 , H01L2224/05568 , H01L2224/05573 , H01L2224/16 , H01L2224/16235 , H01L2924/00014 , H01L2924/15174 , H01L2924/15312 , H05K1/111 , H05K2201/09227 , H05K2201/10674 , Y02P70/611 , H01L2224/05599
摘要： An electronic device, including: a plurality of contacts pads on a surface of a substrate; the contacts pads spaced apart a first predetermined distance in a first direction; and the contact pads spaced apart a second predetermined distance in a second direction, the first predetermined distance different from the second predetermined distance, the first direction perpendicular to the second direction.
摘要翻译：一种电子设备，包括：在基板的表面上的多个接触焊盘; 所述接触垫在第一方向上间隔开第一预定距离; 并且所述接触垫在第二方向上间隔开第二预定距离，所述第一预定距离不同于所述第二预定距离，所述第一方向垂直于所述第二方向。

2. 发明申请

US20040037060A1 Solder ball collapse control apparatus and method thereof 有权
公开(公告)号：US20040037060A1
公开(公告)日：2004-02-26
申请号：US10064857
申请日：2002-08-23
申请人： ATI Technologies, Inc.
发明人： Vincent K. Chan
IPC分类号： H05K007/10 , H05K007/12
CPC分类号： B23K1/0016 , H01L23/49816 , H01L2924/0002 , H05K3/3436 , H05K3/3463 , H05K2201/094 , H05K2201/2036 , Y02P70/613 , H01L2924/00
摘要： A solder ball collapse control apparatus and method thereof includes a plurality of first solder members, pieces of solder material in a shape capable of being used to properly create a solder joint. The first solder members have a first solder dimension and a first melting temperature and are disposed on a carrier substrate, wherein the first solder members include any piece of material capable of being disposed using a solder dispensing machine. The apparatus and method further includes a plurality of second members having a second dimension and a second melting temperature, disposed on the carrier substrate in relation to the plurality of first solder members. The second members include any piece of material capable of being disposed using the solder dispensing machine, wherein the first solder member dimension is greater than the second member dimension and the second melting temperature is greater than the first melting temperature.

3. 发明申请

US20020024802A1 Connection structure for display module and printed substrate, semiconductor device, display module, and elecronic component 失效
标题翻译：显示模块和印刷基板，半导体器件，显示模块和电子元件的连接结构
公开(公告)号：US20020024802A1
公开(公告)日：2002-02-28
申请号：US09940466
申请日：2001-08-29
发明人： Yasunori Chikawa , Kunihiro Satou , Hiroaki Tomokuni
IPC分类号： H05K007/12 , H05K007/02
CPC分类号： H04M1/0266 , G02F1/13452 , H05K1/141 , H05K1/147 , H05K1/189 , H05K3/301 , H05K3/365 , H05K2201/10136
摘要： A connection structure for connecting a display module and a printed substrate is provided, which is appropriate for use in mass production of electronic devices such as a cellular phone in which, while a thin mounting is desired, many components have to be mounted on the printed substrate and the display module is required to be mounted in predetermined space on the printed substrate. The liquid crystal module is provided with a pin electrode on an external connection terminal of its COF, and fixed to a housing in a folded state with respective rear surfaces of the COF and a liquid crystal panel facing each other. A holding member for engaging the printed substrate and holding the printed substrate is formed on the housing. When the holding member engages the printed substrate, the liquid crystal module is fixed to the printed substrate, and at the same time, the pin electrode of the COF and a through hole electrode of the printed substrate are electrically connected.
摘要翻译：提供了用于连接显示模块和印刷基板的连接结构，其适用于批量生产诸如便携式电话的电子设备，其中，在需要薄安装的同时，必须将许多部件安装在印刷基板和显示模块需要安装在印刷基板上的预定空间中。液晶模块在其COF的外部连接端子上设置有针电极，并且以COF的相应后表面和彼此面对的液晶面板的折叠状态固定到壳体。用于接合印刷基板并保持印刷基板的保持构件形成在壳体上。当保持构件与印刷基板接合时，将液晶模块固定在印刷基板上，同时COF的引脚电极和印刷基板的通孔电极电连接。

4. 发明申请

US20030133276A1 Arrangements to improve noise immunity of differential signals 审中-公开
标题翻译：提高差分信号抗噪声的布置
公开(公告)号：US20030133276A1
公开(公告)日：2003-07-17
申请号：US10046783
申请日：2002-01-17
发明人： Dong Zhong , Yuan-Liang Li , David G. Figueroa
IPC分类号： H05K007/10 , H05K007/12
CPC分类号： H01L23/49838 , H01L23/49811 , H01L2924/0002 , H01L2924/3011 , H01R13/6477 , H05K1/0216 , H05K3/3426 , H05K7/1084 , H05K2201/0792 , H05K2201/10704 , H05K2201/10962 , H01L2924/00
摘要： Arrangements are used to improve noise immunity of differential signals.
摘要翻译：安排用于提高差分信号的抗噪声能力

5. 发明申请

US20030103338A1 Electronic package having multiple-zone interconnects and methods of manufacture 有权
标题翻译：具有多区域互连的电子封装和制造方法
公开(公告)号：US20030103338A1
公开(公告)日：2003-06-05
申请号：US10004002
申请日：2001-11-30
申请人： Intel Corporation
发明人： Gilroy J. Vandentop , Yuan-Liang Li
IPC分类号： H05K007/10 , H05K007/12
CPC分类号： H01L24/73 , H01L23/49827 , H01L24/81 , H01L2224/05568 , H01L2224/05573 , H01L2224/16 , H01L2224/81801 , H01L2924/01013 , H01L2924/01029 , H01L2924/01033 , H01L2924/01039 , H01L2924/01082 , H01L2924/014 , H01L2924/14 , H01L2924/1433 , H01L2924/30107 , H01L2924/351 , H05K3/3436 , H05K2201/10378 , H05K2201/10659 , Y02P70/613 , Y10T29/4913 , Y10T29/49144 , Y10T29/49169 , H01L2924/00
摘要： To accommodate thermal stresses arising from different coefficients of thermal expansion (CTE) of a packaged or unpackaged die and a substrate, the package incorporates two or more different interconnect zones. A first interconnect zone, located in a central region of the die, employs a relatively stiff interconnect structure. A second interconnect zone, located near the periphery of the die, employs a relatively compliant interconnect structure. Additional interconnect zones, situated between the first and second interconnect zones and having interconnect structure with compliance qualities intermediate those of the first and second zones, can optionally be employed. In one embodiment, solder connections providing low electrical resistance are used in the first interconnect zone, and compliant connections, such as nanosprings, are used in the second interconnect zone. Methods of fabrication, as well as application of the package to an electronic assembly, an electronic system, and a data processing system are also described.
摘要翻译：为了适应由封装的或未封装的裸片和衬底的不同热膨胀系数（CTE）产生的热应力，封装包含两个或多个不同的互连区域。位于模具的中心区域中的第一互连区域采用相对较硬的互连结构。位于模具周边附近的第二互连区采用相对顺应的互连结构。位于第一和第二互连区之间并具有与第一和第二区之间的顺应性质量的互连结构的附加互连区可以任选地被采用。在一个实施例中，在第一互连区域中使用提供低电阻的焊接连接，并且在第二互连区域中使用诸如纳米脉冲的顺应连接。还描述了制造方法以及将包装应用于电子组件，电子系统和数据处理系统。

6. 发明申请

US20030063448A1 Electronic component package, printed circuit board, and method of inspecting the printed circuit board 失效
标题翻译：电子元件封装，印刷电路板以及检查印刷电路板的方法
公开(公告)号：US20030063448A1
公开(公告)日：2003-04-03
申请号：US10298640
申请日：2002-11-19
申请人： Fujitsu Limited
发明人： Yasuhiro Ichihara , Seiji Kogure , Hiroshi Iimura , Fumio Arase
IPC分类号： H05K001/16 , H05K007/10 , H05K007/12
CPC分类号： H01L23/49838 , H01L23/49816 , H01L2224/16 , H05K3/3436 , H05K2201/09781 , H05K2201/10969 , H05K2201/2018 , Y02P70/613
摘要： There is provided a ball grid array (BGA) electronic component package having a configuration which is capable of improving mounting efficiency as well as preventing footprints from breaking away at circuit-connecting portions of the electronic component package. The BGA package has reinforcing bumps formed in an area located outward of a predetermined area in which conventional circuit-connecting bumps are arranged. Therefore, even if a shock is applied to the BGA package e.g. when a printed circuit board having the BGA package mounted thereon is carelessly dropped during the manufacturing work, at the outer or peripheral portion of the BGA package, which is most sensitive to such a shock, the shock is absorbed by the reinforcing bumps and reinforcing footprints which have no electrical connection with the circuitry of the electronic component package. Thus, the footprints formed on a mounting portion of the BGA package and those formed on the printed circuit board can be prevented from breaking away or being cracked.
摘要翻译：提供了具有能够提高安装效率以及防止在电子部件封装的电路连接部分处的占用空隙的构造的球栅阵列（BGA）电子部件封装。 BGA封装具有形成在布置常规电路连接凸块的预定区域外侧的区域中的增强凸块。因此，即使对BGA封装施加冲击也是如此。当在制造工作期间安装其上具有BGA封装的印刷电路板时，在对这种冲击最为敏感的BGA封装的外部或周边部分处，不小心掉落了冲击，该冲击被加强凸块和加强脚印吸收它们与电子部件封装的电路没有电连接。因此，可以防止形成在BGA封装的安装部分上的印迹和形成在印刷电路板上的印迹破碎或破裂。

7. 发明申请

US20020018340A1 Operating component placement system for electronic equipment 有权
公开(公告)号：US20020018340A1
公开(公告)日：2002-02-14
申请号：US09817923
申请日：2001-03-26
发明人： Hiroshi Okamoto
IPC分类号： H05K007/02 , H05K007/12
CPC分类号： H04B1/38 , H05K5/0017
摘要： In an operating component placement system for electronic equipment, assembly units (5) having cables (8) whereby operating components (6a to 6e) are connected to connectors (7a to 7e) are used to mount the operating components (6a to 6e) to a front panel (4), with connectors (7a to 7e) connected to connectors (3a to 3e) on a panel board (3) for signal input for various functions, and the cable lengths for operating component groups (6a to 6c) and (6d and 6e) having the same form established so as to be longer than the maximum distance between the connectors (3a to 3c) and (3d and 3e) to which each operating component group is to be connected on the panel board 3 and hole groups (4a to 4c) and (4d and 4e) for mounting each of the operating component groups to the front panel. Operating components having the same form can be selectively laid out by changing the cable positioning.

8. 发明申请

US20010032738A1 Method and apparatus for providing power to a microprocessor with integrated thermal and EMI management 失效
标题翻译：用于向具有集成热和EMI管理的微处理器提供电力的方法和装置
公开(公告)号：US20010032738A1
公开(公告)日：2001-10-25
申请号：US09785892
申请日：2001-02-16
发明人： Joseph Ted Dibene II , David Hartke , Kaskade James Hjerpe , Carl E. Hoge
IPC分类号： H05K001/14 , H05K007/20 , H05K007/12 , H05K009/00
CPC分类号： H01L23/433 , G06F1/18 , G06F1/182 , G06F1/189 , H01L23/427 , H01L2224/16225 , H01L2224/32225 , H01L2224/32245 , H01L2224/73204 , H01L2224/73253 , H01L2224/92125 , H01L2924/15192 , H01L2924/15311 , H01L2924/15312 , H01L2924/3011 , H01R4/64 , H01R12/52 , H05K1/0206 , H05K1/0263 , H05K1/141 , H05K1/144 , H05K3/301 , H05K3/368 , H05K7/1092 , H05K2201/10318 , H05K2201/10325 , H05K2201/10598 , H05K2201/10704 , H05K2201/10734 , H05K2201/2018 , H05K2201/2036 , H01L2924/00
摘要： A microprocessor packaging architecture using a modular circuit board assembly that provides power to a microprocessor while also providing for integrated thermal and electromagnetic interference (EMI) is disclosed. The modular circuit board assembly comprises a substrate, having a component mounted thereon, a circuit board, including a circuit for supplying power to the component, and at least one conductive interconnect device disposed between the substrate and the circuit board, the conductive interconnect device configured to electrically couple the circuit to the component.
摘要翻译：公开了一种使用向微处理器供电并同时提供集成热和电磁干扰（EMI）的模块化电路板组件的微处理器封装结构。所述模块化电路板组件包括具有安装在其上的部件的基板，包括用于向所述部件供电的电路的电路板以及设置在所述基板和所述电路板之间的至少一个导电互连装置，所述导电互连装置配置以将电路电耦合到组件。

9. 发明申请

US20040179343A1 Structures for testing circuits and methods for fabricating the structures 有权
标题翻译：用于测试电路的结构和用于制造结构的方法
公开(公告)号：US20040179343A1
公开(公告)日：2004-09-16
申请号：US10418441
申请日：2003-04-16
申请人： Nexcleon, Inc.
发明人： Konstantine N. Karavakis , Tom T. Nguyen
IPC分类号： H05K007/12
CPC分类号： G01R1/0483
摘要： One embodiment of the present invention is a structure useful for testing circuits that includes: (a) a flexible substrate having contactors on a first side and pads on a second side; (b) a rigid substrate having vias aligned with the pads on the second side of the flexible substrate; (c) an adhesive layer comprised of a compliant adhesive material having vias aligned with the pads on the second side of the flexible substrate; the adhesive layer being affixed to the flexible substrate and the rigid substrate; (d) a card; (e) electrical connectors that are retained in the vias of the rigid substrate and the adhesive layer, which electrical connectors have first and second retractable ends, wherein the first retractable ends contact pads on the substrate, and the second retractable ends contact pads on the card; and (f) a clamp that is adapted to fit over the substrate and the adhesive layer, the clamp having an opening to provide access to the contactors, wherein the clamp is connected to the card.
摘要翻译：本发明的一个实施例是用于测试电路的结构，其包括：（a）柔性基板，其具有在第一侧上的接触器和在第二侧上的焊盘; （b）刚性基板，其具有与柔性基板的第二侧上的焊盘对齐的通孔; （c）由柔性粘合剂材料组成的粘合剂层，其具有与柔性基材的第二侧上的焊盘对准的通孔; 所述粘合剂层固定在所述柔性基板和所述刚性基板上; （d）卡; （e）电连接器，其保持在刚性基板和粘合剂层的通孔中，该电连接器具有第一和第二可缩回端，其中第一可缩回端接触基板上的焊盘，而第二可缩回端接触焊盘卡; 和（f）适于装配在所述基底和所述粘合剂层上的夹具，所述夹具具有开口以提供对所述接触器的通路，其中所述夹具连接到所述卡。

10. 发明申请

US20040017672A1 MULTILEVELED PRINTED CIRCUIT BOARD UNIT INCLUDING SUBSTRATE INTERPOSED BETWEEN STACKED BUMPS 失效
标题翻译：多层印刷电路板单元，其中包括堆叠式焊料之间的基板间隔
公开(公告)号：US20040017672A1
公开(公告)日：2004-01-29
申请号：US09749505
申请日：2000-12-28
申请人： FUJITSU LIMITED
发明人： Shinji Matsuda
IPC分类号： H05K007/10 , H05K007/12
CPC分类号： H01L23/49833 , H01L23/13 , H01L23/49816 , H01L23/49827 , H01L2224/16 , H01L2924/00013 , H01L2924/00014 , H05K1/0203 , H05K1/0271 , H05K1/141 , H05K3/3436 , H05K2201/0116 , H05K2201/0195 , H05K2201/049 , H05K2201/068 , H05K2201/09063 , H05K2201/09781 , H05K2201/10378 , H05K2201/10734 , H05K2201/2036 , H05K2203/167 , Y02P70/613 , H01L2224/29099 , H01L2224/0401
摘要： Conductive or solder bumps are stacked between a mounted component such as a BGA device and a printed wiring substrate in a multileveled printed circuit board unit. An interposer or relay substrate is interposed between the adjacent stacked conductive bumps. The interposer substrate is made of a porous material. When any difference in the expansion is caused between the printed wiring substrate and the mounted component, one side of the interposer substrate receives a relatively smaller displacement force while the other side of the interposer substrate receives a relatively larger displacement force. A shearing stress is induced in the interposer substrate. Deformation of the porous material serves to absorb the shearing stress in the interposer substrate. The conductive bumps bonded on one side of the interposer substrate as well as the conductive bumps bonded on the other side of the interposer substrate may be relieved from a shearing stress. Accordingly, the durability of the conductive bumps can be improved. The conductive bumps are allowed to keep a stronger bonding in a longer duration.
摘要翻译：在多层印刷电路板单元中的诸如BGA器件的安装部件和印刷布线基板之间堆叠导电或焊料凸块。在相邻的堆叠的导电凸块之间插入插入件或继电器基板。插入器基板由多孔材料制成。当在印刷布线基板和安装部件之间产生膨胀差异时，插入器基板的一侧接收相对较小的位移力，同时插入器基板的另一侧接收相对较大的位移力。剪切应力在内插衬底中被诱发。多孔材料的变形用于吸收中介层基板中的剪切应力。接合在插入器基板的一侧上的导电凸块以及接合在插入器基板的另一侧上的导电凸起可以减轻剪切应力。因此，能够提高导电性凸块的耐久性。允许导电凸块在更长的持续时间内保持更强的粘合。

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