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    • 1. 发明申请
    • Gain scaling for higher signal-to-noise ratios in multistage, multi-bit delta sigma modulators
    • 在多级多位三角形Σ调制器中增益缩放以获得更高的信噪比
    • US20030085826A1
    • 2003-05-08
    • US10326706
    • 2002-12-23
    • Broadcom Corporation
    • Sandeep K. Gupta
    • H03M003/02
    • H03M3/48H03M3/414
    • An n-bit quantizer of a downstream modulator stage is configured to produce an n-bit quantized signal from an analog signal having a range. The n-bit quantizer divides the range into 2n subranges. A first subrange of the 2n subranges is bounded by a lowest value of the range, a second subrange of the 2n subranges is bounded by a highest value of the range, and at least one remaining subrange of the 2n subranges is positioned between the first and the second subranges. The first and the second subranges each measure greater than null1/null2(2nnull1)nullnull of the total range. Each of the at least one remaining subrange measures less than null1/(2nnull1)null of the total range. A first gain of an integrator of the downstream modulator stage is set so that the downstream modulator stage is stable. A second gain of a stability correction gain element of a coupling stage connected to the downstream modulator is set so that a swing of the analog signal remains within a dynamic range of the downstream modulator stage.
    • 下行调制级的n位量化器被配置为从具有范围的模拟信号产生n位量化信号。 n位量化器将范围分为2n个子范围。 2n个子范围的第一子范围由该范围的最低值界定,2n个子范围的第二子范围由该范围的最大值限定,并且2n个子范围的至少一个剩余子范围位于第一和第 第二个次级 第一和第二子范围大于总范围的{1 / [2(2n-1)]}。 每个至少一个剩余子范围测量值小于总范围的[1 /(2n-1)]。 设置下游调制器级的积分器的第一增益,使得下游调制器级稳定。 设置连接到下游调制器的耦合级的稳定性校正增益元件的第二增益,使得模拟信号的摆幅保持在下游调制器级的动态范围内。