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    • 1. 发明授权
    • Resistive memory element sensing using averaging
    • 电阻式存储元件感应使用平均
    • US06822892B2
    • 2004-11-23
    • US10290297
    • 2002-11-08
    • R. Jacob Baker
    • R. Jacob Baker
    • G11C1121
    • G01R27/02G11C11/16G11C11/1659G11C11/1673G11C13/004G11C13/0061G11C2013/0054
    • A system for determining the logic state of a resistive memory cell element, for example an MRAM resistive cell element. The system includes a controlled voltage supply, an electronic charge reservoir, a current source, and a pulse counter. The controlled voltage supply is connected to the resistive memory cell element to maintain a constant voltage across the resistive element. The charge reservoir is connected to the voltage supply to provide a current through the resistive element. The current source is connected to the charge reservoir repeatedly supply a pulse of current to recharge the reservoir upon depletion of electronic charge from the reservoir, and the pulse counter provides a count of the number of pulses supplied by the current source over a predetermined time. The count represents a logic state of the memory cell element.
    • 一种用于确定电阻性存储单元元件(例如MRAM电阻单元元件)的逻辑状态的系统。 该系统包括受控电压源,电子充电储存器,电流源和脉冲计数器。 受控电压源连接到电阻存储单元元件,以在电阻元件两端保持恒定的电压。 电荷储存器连接到电压源以提供通过电阻元件的电流。 电流源连接到充电储存器,在从储存器耗尽电荷时,重复地提供电流脉冲以对储存器再充电,并且脉冲计数器在预定时间内提供由电流源提供的脉冲数量的计数。 计数表示存储单元元件的逻辑状态。