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1. 发明授权

US08451729B2 Embedded device and packet forwarding method 有权
标题翻译：嵌入式设备和数据包转发方式
公开(公告)号：US08451729B2
公开(公告)日：2013-05-28
申请号：US12770760
申请日：2010-04-30
申请人： Yao-Wen Chang
发明人： Yao-Wen Chang
IPC分类号： G01R31/08 , G06R11/00 , G08C15/00 , H04J1/16 , H04J3/14 , H04L1/00 , H04L12/26
CPC分类号： H04L43/00
摘要： An embedded device includes a wide area network (WAN) port, a plurality of local area network (LAN) ports, and a packet forwarding module to forward packets from the LAN ports to the WAN port. The packet forwarding module detects whether any packets are being dropped in the WAN port, and turns on a bandwidth classification mechanism if the packets are being dropped. The packet forwarding module classifies packets from the LAN ports into different types, and determines the amount of traffic for each type of packet in a fixed time period. The packet forwarding module further compares whether the traffic of each type of packet exceeds a predefined threshold, regards the packets within the predefined threshold as normal packets, and the packets exceeding the predefined threshold as abuse packets. The packet forwarding module drops the abuse packets, and forwards the normal packets to the WAN port.
摘要翻译：嵌入式设备包括广域网（WAN）端口，多个局域网（LAN）端口和转发分组从LAN端口到WAN端口的分组转发模块。报文转发模块检测WAN口是否丢弃任何报文，如果丢弃报文，则打开带宽分类机制。分组转发模块将来自LAN端口的分组分类为不同类型，并且在固定时间段内确定每种类型的分组的流量。分组转发模块进一步比较每种类型的分组的流量是否超过预定义的阈值，将预定义阈值内的分组视为普通分组，超过预定阈值的分组作为滥用分组。报文转发模块丢弃滥用报文，并将正常报文转发到WAN端口。

2. 发明授权

US06901546B2 Enhanced debug scheme for LBIST 失效
标题翻译： LBIST增强的调试方案
公开(公告)号：US06901546B2
公开(公告)日：2005-05-31
申请号：US09876753
申请日：2001-06-07
申请人： Sam Gat-Shang Chu , Joachim Gerhard Clabes , Michael Normand Goulet , Johnny J. Leblanc , James Douglas Warnock
发明人： Sam Gat-Shang Chu , Joachim Gerhard Clabes , Michael Normand Goulet , Johnny J. Leblanc , James Douglas Warnock
IPC分类号： G01R31/317 , G01R31/3185 , G01R31/3187 , G06F11/27 , G01R31/28 , G06R11/00
CPC分类号： G01R31/3187 , G01R31/31705 , G01R31/318502 , G06F11/27
摘要： A device for fault testing in a microprocessor chip provides a LBIST circuit which has a first reference signature. A loading unit is further provided for receiving and outputting a set of masking data. A file unit connected to the loading unit is yet further provided for receiving the masking data. A masking unit connected to the file unit is yet further provided for generating a second reference signature based on the masking data from the file unit and a scanning data from a scan string in the chip. And, a signature logic connected to the output of the masking unit is yet further provided for compressing the second reference signature and inputting the compressed second reference signature to the LBIST circuit, wherein the compressed second reference signature replaces the first reference signature.
摘要翻译：用于微处理器芯片中的故障测试的装置提供具有第一参考标识的LBIST电路。进一步提供加载单元，用于接收和输出一组屏蔽数据。还提供连接到加载单元的文件单元用于接收掩蔽数据。还提供连接到文件单元的掩蔽单元，用于基于来自文件单元的掩蔽数据和来自芯片中的扫描串的扫描数据来生成第二参考签名。并且，还提供连接到屏蔽单元的输出的签名逻辑，用于压缩第二参考签名并将压缩的第二参考签名输入到LBIST电路，其中压缩的第二参考签名替换第一参考签名。

3. 发明授权

US06961865B1 Techniques for resuming a transaction after an error 有权
标题翻译：发生错误后恢复事务的技术
公开(公告)号：US06961865B1
公开(公告)日：2005-11-01
申请号：US09993855
申请日：2001-11-13
申请人： Amit Ganesh , Ekrem Soylemez , Benoit Dageville
发明人： Amit Ganesh , Ekrem Soylemez , Benoit Dageville
IPC分类号： G06R11/00
CPC分类号： G06F11/1474 , Y10S707/99953
摘要： Techniques for executing an atomic transaction include performing a first operation of a first set of operations. The atomic transaction involves the first set of operations for causing changes to a first set of data. A first error that prevents completion of the atomic transaction is detected. In response to detecting the first error, a second set of operations is performed for resolving the first error. It is then determined whether a resolution of the first error is obtained in response to performing the second set of operations. If the resolution is obtained, then execution of the first set of operations is resumed. These techniques allow atomic transactions to be resumed after resolving an error without undoing all the operations accomplished for the transaction at the time the error occurred.
摘要翻译：用于执行原子事务的技术包括执行第一组操作的第一操作。原子事务涉及用于引起对第一组数据的改变的第一组操作。检测到阻止完成原子事务的第一个错误。响应于检测到第一错误，执行第二组操作以解决第一错误。然后确定响应于执行第二组操作是否获得第一错误的分辨率。如果获得分辨率，则恢复第一组操作的执行。这些技术允许在解决错误后恢复原子事务，而不会撤消在发生错误时为事务完成的所有操作。

4. 发明授权

US07093177B2 Low-jitter clock for test system 失效
公开(公告)号：US07093177B2
公开(公告)日：2006-08-15
申请号：US10102536
申请日：2002-03-19
申请人： Burnell G. West , Paolo Dalla Ricca
发明人： Burnell G. West , Paolo Dalla Ricca
IPC分类号： G01R31/28 , G06R11/00
CPC分类号： G01R31/31709 , G01R31/318505 , G01R31/31917 , G01R31/31922 , G01R31/31937 , G11C29/10 , G11C29/56 , G11C2029/0401
摘要： Generating test signals for a device under test (DUT) involves generating a master reference signal, using a vernier technique to generate test pattern signals based on the master reference signal, generating a test clock signal that is phase-matched with and frequency similar to the test pattern signals by providing the master reference signal as input to a phase-locked loop (PLL) and controlling one or more programmable dividers in the PLL to adjust the test clock signal to be a multiple or sub-multiple of a frequency of the test pattern signals, applying the test clock signal to the clock input pin of the DUT, and applying the test pattern signals to data pins of the DUT. When the frequency of the test pattern signals is changed, the test clock signal frequency may be adjusted to calibrate to the changed frequency of the test pattern signals by re-programming the programmable dividers.

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