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1. 发明授权

US07149952B2 Memory management algorithm for trellis decoders 有权
标题翻译：网格解码器的内存管理算法
公开(公告)号：US07149952B2
公开(公告)日：2006-12-12
申请号：US10511655
申请日：2003-03-10
申请人： Inonete Markman
发明人： Inonete Markman
IPC分类号： G03M13/03
CPC分类号： H03M13/4169 , H03M13/3944 , H03M13/3961 , H03M13/6502 , H03M13/6505 , H04L1/0054 , H04L1/0059 , H04N21/2383 , H04N21/4382
摘要： An improved all-path traceback/forward trace system for use in managing the memory used in processing decoded survivor sequences produced by a trellis decoder network. The memory size is decreased to T*N, where T is a predetermined survivor memory depth and N is the number of states in the trellis. The latency value of the present system is equal to T. Both the memory requirement and latency value represent a 33% decrease in the value of similar parameters produced in a prior art APTFT system. An existing forward trace/path selection unit is modified to take advantage of the inherent nature of the forward trace process in order to simplify the decoding system. A generalized version of the APTFT system permits greater flexibility in the choice of memory size and latency values needed to satisfy the requirements of a particular decoding system.
摘要翻译：改进的全路追踪/前向跟踪系统，用于管理由网格解码器网络产生的处理解码的幸存者序列中使用的存储器。存储器大小减小到T * N，其中T是预定的存活器存储器深度，N是网格中的状态数。本系统的延迟值等于T.存储器要求和延迟值表示在现有技术的APTFT系统中产生的类似参数的值减少了33％。修改现有的正向跟踪/路径选择单元以利用前向跟踪处理的固有特性，以简化解码系统。 APTFT系统的一般化版本允许在选择满足特定解码系统要求所需的存储器大小和延迟值方面有更大的灵活性。

2. 发明授权

US07111225B2 Viterbi bit detection method and device 失效
标题翻译：维特比比特检测方法及装置
公开(公告)号：US07111225B2
公开(公告)日：2006-09-19
申请号：US10528939
申请日：2003-08-13
申请人： Willem Marie Julia Marcel Coene , Albert Hendrik Jan Immink , Johannes Wilhelmus Maria Bergmans
发明人： Willem Marie Julia Marcel Coene , Albert Hendrik Jan Immink , Johannes Wilhelmus Maria Bergmans
IPC分类号： G03M13/03
CPC分类号： G11B20/1217 , G11B20/10009 , G11B20/10296 , G11B20/22 , G11B2020/1249 , G11B2020/1288 , G11B2220/2541
摘要： A Viterbi bit detection method for detecting the bit values of bits of a channel data stream stored on a record carrier along an N-dimensional channel tube, N being at least two, of at least two bit rows one-dimensionally evolving along a first direction and being aligned with each other along at least a second of N−1 other directions, the first direction together with the N−1 other directions constituting an N-dimensional lattice of bit positions, includes application of a row-based one-dimensional Viterbi bit detection method independent for each of the bit rows of said channel tube. To achieve a reliable bit detection, a number of independent one-dimensional row-based Viterbi bit detectors, also known as sequence detectors, is used, one for each bit row in the channel tube: the interference between successive neighboring bit rows is taken into account via the computation of the branch metrics (for the considered bit row), in which local bit decisions on the primary neighboring bits in the neighboring rows are used. As local bit detectors going beyond the performance of a threshold detector, the use of a HD-2 or HD-3-like hard-decision bit detector is proposed.
摘要翻译：一种维特比比特检测方法，用于检测沿N维通道管存储在记录载体上的信道数据流的比特值，N是沿着第一方向一维演化的至少两个比特行的至少两个并且沿着N-1个其他方向中的至少第二个方向彼此对准，第一方向与构成比特位置的N维格子的N-1个其他方向一起包括应用基于行的一维维特比位检测方法独立于所述通道管的每个位行。为了实现可靠的比特检测，使用了许多独立的一维行维特比比特检测器（也称为序列检测器），一个用于信道管中的每一比特行：连续相邻比特行之间的干扰被采用通过计算分支度量（对于考虑的比特行），其中使用相邻行中的主相邻比特的本地比特决定。随着本地位检测器超出门限检测器的性能，提出了使用HD-2或HD-3类硬判决位检测器。

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