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1. 发明授权

US09444656B2 Flexible receiver architecture 有权
标题翻译：灵活的接收机架构
公开(公告)号：US09444656B2
公开(公告)日：2016-09-13
申请号：US13289791
申请日：2011-11-04
申请人： Weiqi Ding , Sergey Shumarayev , Peng Li , Sriram Narayan
发明人： Weiqi Ding , Sergey Shumarayev , Peng Li , Sriram Narayan
IPC分类号： H04L25/03
CPC分类号： H04L25/03038 , H04L25/03146 , H04L2025/03573
摘要： One embodiment relates to a receiver circuit for a data link. The receiver circuit includes at least a first signal path, a second signal path, and a path selector circuit. The first signal path includes first equalization circuitry, and the second signal path includes second equalization circuitry. The path selector circuit is configured to select one signal path of the first and second signal paths. Other embodiments and features are also disclosed.
摘要翻译：一个实施例涉及一种用于数据链路的接收机电路。接收机电路至少包括第一信号路径，第二信号路径和路径选择器电路。第一信号路径包括第一均衡电路，第二信号路径包括第二均衡电路。路径选择器电路被配置为选择第一和第二信号路径的一个信号路径。还公开了其它实施例和特征。

2. 发明授权

US08743943B2 High-speed data reception circuitry and methods 有权
标题翻译：高速数据接收电路和方法
公开(公告)号：US08743943B2
公开(公告)日：2014-06-03
申请号：US11192539
申请日：2005-07-28
申请人： Sergey Yuryevich Shumarayev , Wilson Wong , Rakesh Patel
发明人： Sergey Yuryevich Shumarayev , Wilson Wong , Rakesh Patel
IPC分类号： H03H7/30 , H03H7/40 , H03K5/159
CPC分类号： H04L25/03057 , H04L2025/0349 , H04L2025/03573
摘要： Equalization circuitry for receiving a digital data signal includes both feed-forward equalizer (“FFE”) circuitry and decision-feedback equalizer (“DFE”) circuitry. The FFE circuitry may be used to give the DFE circuitry a signal that is at least minimally adequate for proper start-up of the DFE circuitry. Thereafter, more of the burden of the equalization task may be shifted from the FFE circuitry to the DFE circuitry.
摘要翻译：用于接收数字数据信号的均衡电路包括前馈均衡器（“FFE”）电路和判决反馈均衡器（“DFE”）电路。 FFE电路可以用于给DFE电路提供至少最不足以适当启动DFE电路的信号。此后，均衡任务的更多负担可能从FFE电路转移到DFE电路。

3. 发明申请

US20050041732A1 Channel equalizer, method and computer program for equalizing a channel 有权
标题翻译：通道均衡器，均衡通道的方法和计算机程序
公开(公告)号：US20050041732A1
公开(公告)日：2005-02-24
申请号：US10918427
申请日：2004-08-16
申请人： Do-Han Kim , Hyun-Bae Jeon
发明人： Do-Han Kim , Hyun-Bae Jeon
IPC分类号： H04B7/005 , H03K5/159 , H04B1/10 , H04B3/06 , H04B3/10 , H04L25/03 , H04N5/21 , H04N7/015
CPC分类号： H04L25/03057 , H04L2025/03382 , H04L2025/0349 , H04L2025/03573 , H04N5/211
摘要： A channel equalizer, method and computer program for equalizing a channel. The channel equalizer may include a feed forward filter and a switching unit. The switching unit may receive a signal input to the channel equalizer and an output signal from the feed forward filter, and may supply one of the input signal and output signal as an input to the feed forward filter.
摘要翻译：用于均衡通道的通道均衡器，方法和计算机程序。信道均衡器可以包括前馈滤波器和开关单元。切换单元可以接收输入到信道均衡器的信号和来自前馈滤波器的输出信号，并且可以将其中一个输入信号和输出信号作为输入提供给前馈滤波器。

4. 发明授权

US07715473B2 Channel equalizer, method and computer program for equalizing a channel 有权
标题翻译：通道均衡器，均衡通道的方法和计算机程序
公开(公告)号：US07715473B2
公开(公告)日：2010-05-11
申请号：US10918427
申请日：2004-08-16
申请人： Do-Han Kim , Hyun-Bae Jeon
发明人： Do-Han Kim , Hyun-Bae Jeon
IPC分类号： H04B1/38
CPC分类号： H04L25/03057 , H04L2025/03382 , H04L2025/0349 , H04L2025/03573 , H04N5/211
摘要： A channel equalizer, method and computer program for equalizing a channel. The channel equalizer may include a feed forward filter and a switching unit. The switching unit may receive a signal input to the channel equalizer and an output signal from the feed forward filter, and may supply one of the input signal and output signal as an input to the feed forward filter.
摘要翻译：用于均衡通道的通道均衡器，方法和计算机程序。信道均衡器可以包括前馈滤波器和开关单元。切换单元可以接收输入到信道均衡器的信号和来自前馈滤波器的输出信号，并且可以将其中一个输入信号和输出信号作为输入提供给前馈滤波器。

5. 发明申请

US20070025436A1 High-speed data reception circuitry and methods 有权
标题翻译：高速数据接收电路和方法
公开(公告)号：US20070025436A1
公开(公告)日：2007-02-01
申请号：US11192539
申请日：2005-07-28
申请人： Sergey Shumarayev , Wilson Wong , Rakesh Patel
发明人： Sergey Shumarayev , Wilson Wong , Rakesh Patel
IPC分类号： H03H7/30
CPC分类号： H04L25/03057 , H04L2025/0349 , H04L2025/03573
摘要： Equalization circuitry for receiving a digital data signal includes both feed-forward equalizer (“FFE”) circuitry and decision-feedback equalizer (“DFE”) circuitry. The FFE circuitry may be used to give the DFE circuitry a signal that is at least minimally adequate for proper start-up of the DFE circuitry. Thereafter, more of the burden of the equalization task may be shifted from the FFE circuitry to the DFE circuitry.
摘要翻译：用于接收数字数据信号的均衡电路包括前馈均衡器（“FFE”）电路和判决反馈均衡器（“DFE”）电路。 FFE电路可以用于给DFE电路提供至少最不足以适当启动DFE电路的信号。此后，均衡任务的更多负担可能从FFE电路转移到DFE电路。

6. 发明申请

US20040008764A1 Pre-equalizer, VSB transmission system using the same, and transmission method thereof 有权
标题翻译：前置均衡器，VSB传输系统使用相同，及其传输方法
公开(公告)号：US20040008764A1
公开(公告)日：2004-01-15
申请号：US10267818
申请日：2002-10-10
发明人： Jae-Hyun Seo , Yong-Tae Lee , Seung-Won Kim
IPC分类号： H03H007/30
CPC分类号： H04L25/03343 , H04L2025/03484 , H04L2025/03573 , H04L2025/03802
摘要： Disclosed is a pre-equalizer, a vestigial sideband (VSB) transmission system using the pre-equalizer, and a VSB transmission method. A first transmit signal is stored in a first memory, and a pre-equalizer pre-equalizes the first transmit signal based on a set tap coefficient. A transmitter modulates the pre-equalized first transmit signal, and sends the modulated signal. The first transmit signal is fed back to a receiver, which demodulates the transmitted first transmit signal and stores the demodulated signal as the second transmit signal in a second memory. Subsequently, the pre-equalizer calculates a tap coefficient based on an error value as the difference between the first transmit signal and the second transmit signal, and updates the set tap coefficient based on the calculated tap coefficient.
摘要翻译：公开了一种预均衡器，使用前置均衡器的残留边带（VSB）传输系统和VSB传输方法。第一发送信号存储在第一存储器中，并且预均衡器基于设定的抽头系数对第一发送信号进行预均衡。发射机调制预均衡的第一发射信号，并发送调制信号。将第一发送信号反馈到接收机，接收机解调所发送的第一发送信号，并将解调后的信号作为第二发送信号存储在第二存储器中。随后，预均衡器基于作为第一发送信号和第二发送信号之间的差的误差值来计算抽头系数，并且基于计算出的抽头系数来更新设定的抽头系数。

7. 发明授权

US06650702B1 Blind initialization of decision feedback equalizer using an antenna array 有权
标题翻译：使用天线阵列盲判决反馈均衡器的初始化
公开(公告)号：US06650702B1
公开(公告)日：2003-11-18
申请号：US09570704
申请日：2000-05-15
申请人： Greg Steele
发明人： Greg Steele
IPC分类号： H03H730
CPC分类号： H04L1/06 , H04L25/03057 , H04L2025/03375 , H04L2025/0349 , H04L2025/03566 , H04L2025/03573 , H04L2025/0363
摘要： A decision feedback equalizer and method that implements blind initialization using an antenna array. The equalizer comprises the antenna array which includes two or more antenna elements that form input paths. Two or more feedforward finite impulse response (FIR) filters are respectively coupled to the two or more antenna elements. An attenuator and a switch are coupled in parallel to outputs of all but one feedforward FIR filter. An adder combines the signals output by the feedforward FIR filters. A decision device is coupled to the output of the adder. A decision feedback FIR filter is coupled to the output of the decision device whose output is fed back to the adder and combined with other signals summed thereby. A switch is coupled between the decision device and the decision feedback FIR filter. The equalizer is initialized using a blind adaptation algorithm. The equalizer transitions to normal operation by allowing the feedback and feedforward FIR filters to adapt as inputs from all but one antenna element is attenuated to zero. The equalizer normally operates by using inputs from only one antenna element which is processed by the decision device, the decision feedback FIR filter, and the adder.
摘要翻译：一种使用天线阵列实现盲目初始化的判决反馈均衡器和方法。均衡器包括天线阵列，其包括形成输入路径的两个或更多个天线元件。两个或更多个前馈有限脉冲响应（FIR）滤波器分别耦合到两个或更多个天线元件。衰减器和开关并联耦合到除了一个前馈FIR滤波器以外的所有输出。加法器组合由前馈FIR滤波器输出的信号。判决装置耦合到加法器的输出端。决策反馈FIR滤波器耦合到判定装置的输出，其输出反馈给加法器并与其相加的其他信号组合。一个开关耦合在决策设备和决策反馈FIR滤波器之间。均衡器使用盲自适应算法进行初始化。通过允许反馈和前馈FIR滤波器适应从除了一个天线元件之外的所有天线元件的输入衰减到零，均衡器转换到正常操作。均衡器通常通过仅使用由判决装置处理的一个天线元件，判决反馈FIR滤波器和加法器的输入来进行操作。

8. 发明授权

US06370191B1 Efficient implementation of error approximation in blind equalization of data communications 有权
标题翻译：数据通信盲均衡中误差近似的有效实现
公开(公告)号：US06370191B1
公开(公告)日：2002-04-09
申请号：US09431687
申请日：1999-11-01
申请人： Shivaling S. Mahant-Shetti , Srinath Hosur , Alan Gatherer
发明人： Shivaling S. Mahant-Shetti , Srinath Hosur , Alan Gatherer
IPC分类号： H04L2710
CPC分类号： G06F7/552 , G06F2207/5525 , H04L25/0307 , H04L2025/03401 , H04L2025/03477 , H04L2025/0349 , H04L2025/03573 , H04L2025/0363
摘要： A cable modem (20) having a blind equalizer (40) in its equalization function (28) is disclosed. The blind equalizer (40) includes an adaptive equalizer (44) and an approximating update function (42) that provides updated equalization coefficients to the adaptive equalizer (44) using the Constant Modulus Algorithm, wherein the error in the adaptive equalizer output is estimated. The estimates are based upon a determination of the maximum and minimum of the real and i components of symbols output by the adaptive equalizer (44). Efficiency in the computations required for updating the equalizer coefficients is obtained, without sacrificing convergence.
摘要翻译：公开了一种在其均衡功能（28）中具有盲均衡器（40）的电缆调制解调器（20）。盲均衡器（40）包括使用恒模算法向自适应均衡器（44）提供更新的均衡系数的自适应均衡器（44）和近似更新功能（42），其中估计自适应均衡器输出中的误差。估计基于由自适应均衡器（44）输出的符号的真实和i分量的最大值和最小值的确定。获得更新均衡器系数所需的计算的效率，而不会牺牲收敛。

9. 发明授权

US5787118A Adaptive equalizer and adaptive diversity equalizer 失效
公开(公告)号：US5787118A
公开(公告)日：1998-07-28
申请号：US636152
申请日：1996-04-22
申请人： Koji Ueda
发明人： Koji Ueda
IPC分类号： H04B1/76 , H04B3/06 , H04B7/005 , H04B7/02 , H04B7/08 , H04L1/06 , H04L25/03 , H04L27/01 , H03H7/30
CPC分类号： H04L1/06 , H04B7/082 , H04L25/03038 , H04L25/03057 , H04L2025/03541 , H04L2025/03573
摘要： An adaptive equalizer which has a decision feedback adaptive equalizer unit 41, a linear adaptive equalizer unit 42, comparing circuit 47 which compares integrated equalizing error value of the decision feedback adaptive equalizer 41 with integrated estimation error value of the linear adaptive equalizer unit 42, and selecting circuit 48. The selecting circuit 48 selects one of the equalizer units 41 and 42, which has the better performance based on the result of the comparison of comparing circuit 47.

10. 发明授权

US5541956A Adaptive equalizer and adaptive diversity equalizer 失效
标题翻译：自适应均衡器和自适应分集均衡器
公开(公告)号：US5541956A
公开(公告)日：1996-07-30
申请号：US292612
申请日：1994-08-18
申请人： Koji Ueda
发明人： Koji Ueda
IPC分类号： H04B1/76 , H04B3/06 , H04B7/005 , H04B7/02 , H04B7/08 , H04L1/06 , H04L25/03 , H04L27/01 , H03H7/30
CPC分类号： H04L1/06 , H04B7/082 , H04L25/03038 , H04L25/03057 , H04L2025/03541 , H04L2025/03573
摘要： An adaptive equalizer which has a decision feedback adaptive equalizer unit 41, a linear adaptive equalizer unit 42, comparing circuit 47 which compares integrated equalizing error value of the decision feedback adaptive equalizer 41 with integrated estimation error value of the linear adaptive equalizer unit 42, and selecting circuit 48. The selecting circuit 48 selects one of the equalizer units 41 and 42, which has the better performance based on the result of the comparison of comparing circuit 47.
摘要翻译：具有判决反馈自适应均衡器单元41，线性自适应均衡器单元42的自适应均衡器，将判决反馈自适应均衡器41的积分均衡误差值与线性自适应均衡器单元42的积分估计误差值进行比较的比较电路47，以及选择电路48根据比较电路47的比较结果，选择均衡器单元41和42中的一个，其具有更好的性能。

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