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    • 2. 发明申请
    • COGNITIVE SIGNAL CONVERTER
    • 认知信号转换器
    • US20160322984A1
    • 2016-11-03
    • US15107568
    • 2014-12-03
    • Anacatum Design ABFingerprint Cards AB
    • Rolf SUNDBLADStaffan HOLMBRINGRobert HÄGGLUNDEmil HJALMARSSON
    • H03M1/12H03M1/10H03M1/46H03M1/38
    • H03M1/1245H03M1/0624H03M1/1009H03M1/1265H03M1/38H03M1/46
    • A cognitive signal converter connectable to an analog signal source via an analog signal input port and adapted to produce a digital output signal based on an analog input signal received via the analog signal input port is disclosed. The cognitive signal converter comprises an analog-to-digital converter and a cognitive network. The analog-to-digital converter is adapted to produce a digital converted signal based on the analog input signal, a sample clock signal and a process clock signal by sampling the analog input signal in accordance with the sample clock signal and quantizing each analog input signal sample, wherein the quantizing process is operated by the process clock signal. The cognitive network is adapted to receive the digital converted signal of the analog-to-digital converter, control at least one of the sample clock signal and the process clock signal based on the received digital converted signal and one or more characteristics of the analog signal source, and produce the digital output signal based on the received digital converted signal. Corresponding integrated circuit, electronic device and method are also disclosed.
    • 公开了一种通过模拟信号输入端口连接到模拟信号源并适于产生基于经由模拟信号输入端口接收的模拟输入信号的数字输出信号的认知信号转换器。 认知信号转换器包括模数转换器和认知网络。 模拟 - 数字转换器适于基于模拟输入信号,采样时钟信号和处理时钟信号,通过根据采样时钟信号对模拟输入信号进行采样并量化每个模拟输入信号来产生数字转换信号 采样,其中量化处理由处理时钟信号操作。 认知网络适于接收模拟 - 数字转换器的数字转换信号,基于接收的数字转换信号和模拟信号的一个或多个特性来控制采样时钟信号和处理时钟信号中的至少一个 源,并且基于接收到的数字转换信号产生数字输出信号。 还公开了相应的集成电路,电子设备和方法。
    • 6. 发明申请
    • SYSTEMS AND METHODS FOR ACQUIRING AND DECODING SIGNALS USING COMPRESSED SENSING
    • 使用压缩感测获取和解码信号的系统和方法
    • US20120249353A1
    • 2012-10-04
    • US13406509
    • 2012-02-27
    • Mohammad A. KhajehnejadBabak HassibiJuhwan Yoo
    • Mohammad A. KhajehnejadBabak HassibiJuhwan Yoo
    • H03M1/12
    • H03M1/1265H03M1/121H03M7/3062
    • Systems and methods in accordance with embodiments of the invention utilize a CS architecture based on a sub-linear time recovery process (with reduced memory requirements). In several embodiments, a novel structured measurement matrix is exploited during signal acquisition allowing the use of a recovery process based on relatively simple computational primitives making it more amenable to implementation in a fully-integrated form. One embodiment of the invention includes an analog front end configured to receive an analog input signal, and CS sampling circuitry connected to an output of the analog front end and configured to generate a plurality of measurements using a structured measurement matrix, where each row of the structured measurement matrix is generated using a different predetermined check node. In addition, the CS sampling circuitry is configured to generate the plurality of measurements at a rate that is less than the Nyquist rate of the analog input signal.
    • 根据本发明的实施例的系统和方法利用基于亚线性时间恢复过程(具有减少的存储器要求)的CS架构。 在几个实施例中,在信号获取期间利用新颖的结构化测量矩阵,允许使用基于相对简单的计算原语的恢复过程,使得更适合以完全集成的形式实现。 本发明的一个实施例包括被配置为接收模拟输入信号的模拟前端和连接到模拟前端的输出并被配置为使用结构化测量矩阵生成多个测量的CS采样电路,其中, 使用不同的预定校验节点生成结构化测量矩阵。 另外,CS采样电路被配置为以小于模拟输入信号的奈奎斯特速率的速率产生多个测量。